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MC9S08QD2 Dataheets PDF



Part Number MC9S08QD2
Manufacturers Freescale Semiconductor
Logo Freescale Semiconductor
Description Microcontrollers
Datasheet MC9S08QD2 DatasheetMC9S08QD2 Datasheet (PDF)

MC9S08QD4 MC9S08QD2 S9S08QD4 S9S08QD2 Data Sheet HCS08 Microcontrollers MC9S08QD4 Rev. 7 08/2022 nxp.com MC9S08QD4 Series Features 8-Bit HCS08 Central Processor Unit (CPU) • Flash block protect • 16 MHz HCS08 CPU (central processor unit) • HC08 instruction set with added BGND instruction • Background debugging system • Breakpoint capability to allow single breakpoint setting during in-circuit debugging (plus two more breakpoints in on-chip debug module) • Support for up to 32 interrupt/reset.

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MC9S08QD4 MC9S08QD2 S9S08QD4 S9S08QD2 Data Sheet HCS08 Microcontrollers MC9S08QD4 Rev. 7 08/2022 nxp.com MC9S08QD4 Series Features 8-Bit HCS08 Central Processor Unit (CPU) • Flash block protect • 16 MHz HCS08 CPU (central processor unit) • HC08 instruction set with added BGND instruction • Background debugging system • Breakpoint capability to allow single breakpoint setting during in-circuit debugging (plus two more breakpoints in on-chip debug module) • Support for up to 32 interrupt/reset sources Memory • Flash read/program/erase over full operating voltage and temperature • Flash size: — MC9S08QD4/S9S08QD4: 4096 bytes — MC9S08QD2/S9S08QD2: 2048 bytes • RAM size — MC9S08QD4/S9S08QD4: 256 bytes — MC9S08QD2/S9S08QD2: 128 bytes Power-Saving Modes • Wait plus three stops Clock Source Options • ICS — Internal clock source module (ICS) containing a frequency-locked-loop (FLL) controlled by internal. Precision trimming of internal reference allows 0.2% resolution and 2% deviation over temperature and voltage. System Protection Peripherals • ADC — 4-channel, 10-bit analog-to-digital converter with automatic compare function, asynchronous clock source, temperature sensor and internal bandgap reference channel. ADC is hardware triggerable using the RTI counter. • TIM1 — 2-channel timer/pulse-width modulator; each channel can be used for input capture, output compare, buffered edge-aligned PWM, or buffered center-aligned PWM • TIM2 — 1-channel timer/pulse-width modulator; each channel can be used for input capture, output compare, buffered edge-aligned PWM, or buffered center-aligned PWM • KBI — 4-pin keyboard interrupt module with software selectable polarity on edge or edge/level modes Input/Output • Four General-purpose input/output (I/O) pins, one input-only pin and one output-only pin. Outputs 10 mA each, 60 mA maximum for package. • Software selectable pullups on ports when used as input • Software selectable slew rate control and drive strength on ports when used as output • Internal pullup on RESET and IRQ pin to reduce customer system cost Development Support • Watchdog computer operating properly (COP) reset with option to run from dedicated 32 kHz internal clock source or bus clock • Low-voltage detection with reset or interrupt • Illegal opcode detection with reset • Illegal address detection with reset • Single-wire background debug interface Package Options • 8-pin SOIC package • 8-pin PDIP (Only for MC9S08QD4 and MC9S08QD2) • All package options are RoHS compliant MC9S08QD4 Data Sheet Covers: MC9S08QD4 MC9S08QD2 S9S08QD4 S9S08QD2 MC9S08QD4 Rev. 7 08/2022 Revision History To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com/ The following revision history table summarizes changes contained in this document. Revision Number 1 2 3 4 5 6 7 Revision Date Description of Changes 15 Sep 06 09 Jan 07 19 Nov. 07 9 Sep 08 24 Nov 08 14 Oct 10 24 Aug 22 Initial public release Added MC9S08QD2 information; added “M” temperature range (–40 °C to 125 °C); updated temperature sensor equation in the ADC chapter. Added S9S08QD4 and S9S08QD2 information for automotive applications. Revised "Accessing (read or write) any flash control register..." to “ Writing any flash control register...” in Section 4.5.5, “Access Errors.” Changed the SPMSC3 in Section 5.6, “Low-Voltage Detect (LVD) System,” and Section 5.6.4, “Low-Voltage Warning (LVW),” to SPMSC2. Added VPOR to Table A-5. Updated “How to Reach Us” information. Revised dc injection current in Table A-5. Added TJMax in the Table A-2. Updated the Fab and Maskset Indicator Suffix in Device Numbering Scheme. This product incorporates SuperFlash® technology licensed from SST. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. © Freescale Semiconductor, Inc., 2006-2010. All rights reserved. MC9S08QD4 Series MCU Data Sheet, Rev 7 6 Freescale Semiconductor List of Chapters Chapter 1 Chapter 2 Chapter 3 Chapter 4 Chapter 5 Chapter 6 Chapter 7 Chapter 8 Chapter 9 Chapter 10 Chapter 11 Chapter 12 Appendix A Appendix B Device Overview ...................................................................... 15 External Signal Description .................................................... 19 Modes of Operation ................................................................. 25 Memory Map and Register Definition .................................... 31 Resets, Interrupts, and General System Control.................. 51 Parallel Input/Output Control.................................................. 67 Central Processor Unit (S08CPUV2) ...................................... 73 Analog-to-Digital Converter (ADC10V1) .........................


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