Motor Driver. A3974 Datasheet


A3974 Driver. Datasheet pdf. Equivalent


Part Number

A3974

Description

Dual Dmos Full-bridge Microstepping PWM Motor Driver

Manufacture

Allegro Micro Systems

Total Page 11 Pages
Datasheet
Download A3974 Datasheet


A3974
A3974
DMOS Dual Full-Bridge PWM Motor Driver
Features and Benefits
±1.5 A, 50 V continuous output rating
Low rDS(on) DMOS output drivers
Programmable slow, fast, and mixed current-decay modes
Serial-interface controls chip functions
Synchronous rectification for low power dissipation
Internal UVLO and thermal shutdown circuitry
Crossover-current protection
Sleep and idle modes
Package: 44-pin PLCC with internally
fused pins (suffix ED)
Not to scale
Description
Designed for pulse width modulated (PWM) current control
of two DC motors, the A3974 is capable of output currents to
±1.5 A and operating voltages to 50 V. Internal fixed off-time
PWM current-control timing circuitry can be programmed via
a serial interface to operate in slow, fast, and mixed current-
decay modes.
Independent ENABLE input terminals are provided for use
in controlling the speed and torque of each DC motor with
externally applied PWM control signals.
Synchronous rectification circuitry allows the load current
to flow through the low rDS(on) of the DMOS output driver
during the current decay. This feature will eliminate the need
for external clamp diodes in most applications, saving cost
and external component count, while minimizing power
dissipation.
Internal circuit protection includes thermal shutdown with
hysteresis, undervoltage monitoring of VDD and the charge
pump, and crossover-current protection. Special power-up
sequencing is not required.
TheA3974 is supplied in a 44-pin plastic PLCC with 3 internally
fused pins on each side, for maximum heat dissipation.The fused
pins are at ground potential and need no electrical isolation.
Pin-out Diagram
29319.35C
NC 7
STROBE 8
CLOCK 9
DATA 10
GND 11
GND 12
GND 13
REF1 14
REF2 15
LOGIC
SUPPLY 16 VDD
NC 17
VBB1
PROGRAM
PWM TIMER
LOGIC
PROGRAM
PWM TIMER
LOGIC
VBB2
39 NC
38 CP2
37 CP1
36 CP
35 GND
34 GND
33 GND
32 OSC
31 SLEEP
30 VREG
29 NC
Dwg. PP-073

A3974
A3974
DMOS Dual Full-Bridge PWM Motor Driver
Selection Guide
Part Number
A3974SED-T
A3974SEDTR-T
Packing
27 pieces per tube
450 pieces per reel
Absolute Maximum Ratings
Characteristic
Load Supply Voltage
Logic Supply Voltage
Logic Input Voltage Range
Reference Voltage
Sense Voltage (DC)
Output Current
Operating Ambient Temperature
Maximum Junction Temperature
Storage Temperature
Symbol
VBB
VDD
VIN
VREF
VS
IOUT
TA
TJ(max)
Tstg
Notes
Continuous
Pulsed, tw < 30 ns
Continuous
Pulsed, tw < 1 μs
Output current rating may be limited by duty
cycle, ambient temperature, and heat sinking.
Under any set of conditions, do not exceed the
specified current rating or a junction temperature
of 150°C.
Range S
Rating
50
7.0
–0.3 to VDD+ 0.3
–1.0 to VDD+ 1.0
3
0.5
2.5
±1.5
–20 to 85
150
–55 to 150
Units
V
V
V
V
V
V
V
A
ºC
ºC
ºC
Thermal Characteristics may require derating at maximum conditions, see application information
Characteristic
Symbol
Test Conditions*
Package Thermal Resistance
RθJA 4-layer PCB based on JEDEC standard
RθJT
*Additional thermal information available on the Allegro website.
Value Units
22 ºC/W
6 ºC/W
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2


Features www.DataSheet4U.com 3974 LOAD 43 SUPPLY 1 SENSE1 OUT1A ENABLE1 GND GND GND NC O UT1B NC NC DMOS DUAL FULL-BRIDGE PWM M OTOR DRIVER Designed for pulse-width mo dulated (PWM) current control of two dc motors, the A3974SED is capable of out put currents to ±1.5 A and operating v oltages to 50 V. Internal fixed off-tim e PWM current-control timing circuitry can be programmed via a serial interfac e to operate in slow, fast, and mixed c urrent-decay modes. Independant ENABLE input terminals are provided for use in controlling the speed and torque of ea ch dc motor with externally applied PWM control signals. Synchronous rectifica tion circuitry allows the load current to flow through the low rDS(on) of the DMOS output driver during the current d ecay. This feature will eliminate the n eed for external clamp diodes in most a pplications, saving cost and external c omponent count, while minimizing power dissipation. Internal circuit protectio n includes thermal shutdown with hysteresis, undervoltage monito.
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