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74VCXH16373

ON Semiconductor

Low-Voltage 1.8/2.5/3.3 V 16-Bit Transparent Latch

www.DataSheet4U.com 74VCXH16373 Low−Voltage 1.8/2.5/3.3 V 16−Bit Transparent Latch With 3.6 V−Tolerant Inputs and Outp...


ON Semiconductor

74VCXH16373

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www.DataSheet4U.com 74VCXH16373 Low−Voltage 1.8/2.5/3.3 V 16−Bit Transparent Latch With 3.6 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) The 74VCXH16373 is an advanced performance, non−inverting 16−bit transparent latch. It is designed for very high−speed, very low−power operation in 1.8 V, 2.5 V or 3.3 V systems. The VCXH16373 is byte controlled, with each byte functioning identically, but independently. Each byte has separate Output Enable and Latch Enable inputs. These control pins can be tied together for full 16−bit operation. When operating at 2.5 V (or 1.8 V) the part is designed to tolerate voltages it may encounter on either inputs or outputs when interfacing to 3.3 V busses. It is guaranteed to be overvoltage tolerant to 3.6 V. The 74VCXH16373 contains 16 D−type latches with 3−state 3.6 V−tolerant outputs. When the Latch Enable (LEn) inputs are HIGH, data on the Dn inputs enters the latches. In this condition, the latches are transparent, (a latch output will change state each time its D input changes). When LE is LOW, the latch stores the information that was present on the D inputs a setup time preceding the HIGH−to−LOW transition of LE. The 3−state outputs are controlled by the Output Enable (OEn) inputs. When OE is LOW, the outputs are enabled. When OE is HIGH, the standard outputs are in the high impedance state, but this does not interfere with new data entering into the latches. The data inputs include active bushold circuitry, eliminating the nee...




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