EMC4DXV5T1

www.DataSheet4U.com EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1 Preferred Devices Dual Common Base−Collector Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network Q1 http://onsemi.com 3 R1 2 R2 1 R2 R1 4 Q2 The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the EMC2DXV5T1 series, two complementary BRT devices are housed in the SOT−553 package which is ideal for low power surface mount applications where board space is at a premium. Features 5 5 1 Simplifies Circuit Design Reduces Board Space Reduces Component Count These are Pb−Free Devices SOT−553 CASE 463B MARKING DIAGRAM MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1 and Q2, − minus sign for Q1 (PNP) omitted) Rating Collector-Base Voltage Collector-Emitter Voltage Collector Current Symbol VCBO VCEO IC Value 50 50 100 Unit Vdc Vdc mAdc Ux = Specific Device Code x = C, 3, E, or 5 M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) Ux M G G Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not n...