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MC74AC74

ON Semiconductor

Dual D-Type Positive Edge-Triggered Flip-Flop

Dual D-Type Positive Edge-Triggered Flip-Flop MC74AC74, MC74ACT74 The MC74AC74/74ACT74 is a dual D−type flip−flop with A...


ON Semiconductor

MC74AC74

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Description
Dual D-Type Positive Edge-Triggered Flip-Flop MC74AC74, MC74ACT74 The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input. Asynchronous Inputs: LOW input to SD (Set) sets Q to HIGH level LOW input to CD (Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH Features Outputs Source/Sink 24 mA ′ACT74 Has TTL Compatible Inputs These are Pb−Free Devices VCC CD2 D2 CP2 SD2 Q2 Q2 14 13 12 11 10 9 8 DATA SHEET www.onsemi.com 14 1 MARKING DIAGRAMS 14 SOIC−14 D SUFFIX CASE 751A XXXXXXG AWLYWW 1 14 1 14 TSSOP−14 DT SUFFIX CASE 948G XXX XXX ALYWG G 1 XXX = Specific Device Code A = Assembly Location WL or L = Wafer Lot Y = Year WW or W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. D1 CD1 Q1 CP1 SD1 Q1 CP2 SD2 Q2 D2 CD2 Q2 1234567 CD...




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