Document
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
Low-Voltage CMOS 16-Bit Transceiver/Registered Transceiver With Dual Enable
With 5V-Tolerant Inputs and Outputs (3-State, Non-Inverting)
MC74LCX16652
The MC74LCX16652 is a high performance, non–inverting 16–bit transceiver/registered transceiver operating from a 2.7 to 3.6V supply. The device is byte controlled. Each byte has separate control inputs which can be tied together for full 16–bit operation. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5V allows MC74LCX16652 inputs to be safely driven from 5V devices. The MC74LCX16652 is suitable for memory address driving and all TTL level bus oriented transceiver applications. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes from a LOW–to–HIGH logic level. Output Enable pins (OEBAn, OEABn) are provided to control the transceiver outputs. In the transceiver mode, data present at the high impedance port may be stored in either the A or the B register or in both. The select controls (SBAn, SABn) can multiplex stored and real–time (transparent mode) data. In the isolation mode (both outputs disabled), www.DataSheet4U.com A data may be stored in the B register or B data may be stored in the A register. When in the real–time mode, it is possible to store data without using the internal registers by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input (data retention is not guaranteed in this mode).
LOW–VOLTAGE CMOS 16–BIT TRANSCEIVER/ REGISTERED TRANSCEIVER WITH DUAL ENABLE
DT SUFFIX PLASTIC TSSOP PACKAGE CASE 1202–01
• • • • • • • • •
Designed for 2.7 to 3.6V VCC Operation 5.7ns Maximum tpd 5V Tolerant — Interface Capability With 5V TTL Logic Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0V LVTTL Compatible LVCMOS Compatible 24mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in All Three Logic States (20µA) Substantially Reduces System Power Requirements • Latchup Performance Exceeds 500mA • ESD Performance: Human Body Model >2000V; Machine Model >200V
PIN NAMES
Pins A0–A15 B0–B15 CABn, CBAn SABn, SBAn OEBAn, OEABn Function Side A Inputs/Outputs Side B Inputs/Outputs Clock Pulse Inputs Select Control Inputs Output Enable Inputs
This document contains information on a new product. Specifications and information herein are subject to change without notice. 11/96
© Motorola, Inc. 1996
1
REV 0.2
MC74LCX16652
OEAB1 1 CAB1 2 SAB1 3 GND 4 A0 5 A1 6 VCC 7 A2 8 A3 9 A4 10 GND 11 A5 12 A6 13 A7 14 A8 15 A9 16 A10 17 GND 18 A11 19 A12 20 A13 21 VCC 22 A14 23 A15 24 GND 25 SAB2 26 CAB2 27 OEAB2 28
56 OEBA1 55 CBA1 54 SBA1 53 GND 52 B0 51 B1 50 VCC 49 B2 48 B3 47 B4 46 GND 45 B5 44 B6 43 B7 42 B8 41 B9 40 B10 39 GND 38 B11 37 B12 36 B13 35 VCC 34 B14 33 B15 32 GND 31 SBA2 30 CBA2 29 OEBA2
MOTOROLA
2
LCX DATA BR1339 — REV 3
MC74LCX16652
CBA1 OEAB1 OEBA1 SBA1 SAB1 CAB1
55 1 56 54 3 2
LOGIC DIAGRAM
C A0:7 Q D
C Q D B0:7
1 of 8 Channels
To 7 Other Channels
CBA2 OEAB2 OEBA2 SBA2 SAB2 CAB2
30 28 29 31 26 27
C A8:15 Q D
C Q D B8:15
1 of 8 Channels
To 7 Other Channels
LCX DATA BR1339 — REV 3
3
MOTOROLA
MC74LCX16652
BUS APPLICATIONS Real Time Transfer – Bus B to Bus A Real Time Transfer – Bus A to Bus B
BUS B
OEAB L
OEBA L
CAB X
CBA X
SAB X
SBA L
OEAB H
OEBA H
CAB X
CBA X
SAB L
Store Data from Bus A, Bus B or Bus A and Bus B
Transfer A Stored Data to Bus B or Stored Data Bus B to Bus A or Both at the Same Time
BUS B
OEAB X L L
OEBA H X H
CAB ↑ X ↑
CBA X ↑ ↑
SAB X X X
SBA X X X
OEAB H L H
OEBA H L L
CAB H or L X H or L
CBA X H or L H or L
SAB H X H
Store Bus A in Both Registers or Store Bus B in Both Registers
Isolation
BUS B
OEAB H L
OEBA H L
CAB ↑ ↑
CBA ↑ ↑
SAB L X
SBA X L
OEAB L
OEBA H
CAB H or L
CBA H or L
SAB X
MOTOROLA
4
LCX DATA BR1339 — REV 3
BUS B SBA X
BUS A
BUS A
BUS B SBA X H H
BUS A
BUS A
BUS B SBA X
BUS A
BUS A
MC74LCX16652
FUNCTION TABLE
Inputs OEABn L OEBAn H ↑ ↑ H H ↑ X* L H ↑ X* L H L L X* ↑ X X X* ↑ X X H L ↑ ↑ H H L H L H X X X X ↑ ↑ X X X X CABn CBAn SABn SBAn An Input X l h Input L H X l h L H Output L H QB L H QB QB Output QB Data Ports Operating Mode Bn Input X l h Output L H QA L H QA QA Input L H X l h L H Output QA Stored A Data to B Bus, Stored B Data to A Bus Real Time B Data to A Bus Stored B Data to A Bus Real Time B Data to A Bus; Store B Data Clock B Data to A Bus; Store B Data Real Time A Data to B Bus Stored A Data to B Bus Real TIme A Data to B Bus; Store A Data Clock A Data to B Bus; Store A Data Isolation, Hold Storage Store A and/or B Data
H = High Voltage Level; h = High Voltage Level One Setup Time Prior to the Low–to–High Clock Transition; L = Low Voltage Level; l = Low Voltage Level One Setup Time Pr.