LOW-VOLTAGE CMOS OCTAL LATCHING TRANSCEIVER
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
Low-Voltage CMOS Octal Latching Transceiver
With 5V-Tolerant...
Description
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
Low-Voltage CMOS Octal Latching Transceiver
With 5V-Tolerant Inputs and Outputs (3-State, Non-Inverting)
MC74LCX543
The MC74LCX543 is a high performance, non–inverting octal latching transceiver operating from a 2.7 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5V allows MC74LCX543 inputs to be safely driven from 5V devices. The MC74LCX543 is suitable for memory address driving and all TTL level bus oriented transceiver applications. For data flow from A to B with the EAB LOW, the A–to–B Output Enable (OEAB) must be LOW in order to enable data to the B bus, as indicated in the Function Table. With EAB LOW, a LOW signal on the A–to–B Latch Enable (LEAB) input makes the A–to–B latches transparent; a subsequent LOW–to–HIGH transition of the LEAB signal will latch the A latches, and the outputs no longer change with the A inputs. With EAB and OEAB both LOW, the 3–State B output buffers are active and reflect the data present at the output of the A latches. Control of data flow from B to A is symetric to that above, but uses the EBA, LEBA, and OEBA inputs.
LOW–VOLTAGE CMOS OCTAL LATCHING TRANSCEIVER
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DW SUFFIX PLASTIC SOIC CASE 751E–04
Designed for 2.7 to 3.6V VCC Operation 5V Tolerant — Interface Capability With 5V TTL Logic Supports Live ...
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