NB7L14M

NB7L14M 2.5V/3.3V Differential 1:4 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination Description http://onsemi.com MARKING DIAGRAM* 16 1 The NB7L14M is a differential 1−to−4 clock/data distribution chip with internal source terminated CML output structures, optimized for minimal skew and jitter. Device produces four identical output copies of clock or data operating up to 8 GHz or 12 Gb/s, respectively. As such, NB7L14M is ideal for SONET, GigE, Fiber Channel, Backplane and other clock/data distribution applications. Inputs incorporate internal 50 W termination resistors and accept LVPECL, CML, LVCMOS, LVTTL, or LVDS (See Table 6). Differential 16 mA CML outputs provide matching internal 50 W terminations, and 400 mV output swings when externally terminated with 50 W to VCC (See Figure 14). The device is offered in a low profile 3x3 mm 16−pin QFN package. Application notes, models, and support documentation are available at www.onsemi.com. Features QFN−16 MN SUFFIX CASE 485G NB7L 14M ALYWG G A L Y W G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. www.DataSheet4U.com Maximum Input Clock Frequency up to 8 GHz Typical Maximum Input Data Rate up to 12 Gb/s Typical < 0.5 ps of RMS Clock Jitter < 10 ps of Data Dependent Jitter 30 ps Typical Rise and Fall Times 110 ps Typical Propagat...