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80C154 Dataheets PDF



Part Number 80C154
Manufacturers TEMIC Semiconductors
Logo TEMIC Semiconductors
Description CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller
Datasheet 80C154 Datasheet80C154 Datasheet (PDF)

80C154/83C154 CMOS 0 to 36 MHz Single Chip 8–bit Microcontroller Description TEMIC’s 80C154 and 83C154 are high performance CMOS single chip µC. The 83C154 retains all the features of the 80C52 with extended ROM capacity (16 K bytes), 256 bytes of RAM, 32 I/O lines, a 6-source 2-level interrupts, a full duplex serial port, an on-chip oscillator and clock circuits, three 16 bit timers with extra features : 32 bit timer and watchdog functions. Timer 0 and 1 can be configured by program to implemen.

  80C154   80C154


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80C154/83C154 CMOS 0 to 36 MHz Single Chip 8–bit Microcontroller Description TEMIC’s 80C154 and 83C154 are high performance CMOS single chip µC. The 83C154 retains all the features of the 80C52 with extended ROM capacity (16 K bytes), 256 bytes of RAM, 32 I/O lines, a 6-source 2-level interrupts, a full duplex serial port, an on-chip oscillator and clock circuits, three 16 bit timers with extra features : 32 bit timer and watchdog functions. Timer 0 and 1 can be configured by program to implement a 32 bit timer. The watchdog function can be activated either with timer 0 or timer 1 or both together (32 bit timer). In addition, the 83C154 has 2 software-selectable modes of reduced activity for further reduction in power 80C154 : ROMless version of the 83C154µ 80C154/83C154-12 : 0 to 12 MHz 80C154/83C154-16 : 0 to 16 MHz 80C154/83C154-20 : 0 to 20 MHz 80C154/83C154-25 : 0 to 25 MHz 80C154/83C154-30 : 0 to 30 MHz consumption. In the idle mode the CPU is frozen while the RAM is saved, and the timers, the serial port and the interrupt system continue to function. In the power down mode the RAM is saved and the timers, serial port and interrupt continue to function when driven by external clocks. In addition as for the TEMIC 80C51/80C52, the stop clock mode is also available. The 80C154 is identical to the 83C154 except that it has no on-chip ROM. TEMIC’s 80C154 and 83C154 are manufactured using SCMOS process which allows them to run from 0 up to 36 MHz with Vcc = 5 V. D D D D D D D 80C154/83C154-36 : 0 to 36 MHz D 80C154/83C154-L16 : Low power version VCC : 2.7-5.5 V Freq : 0-16 MHz For other speed and temperature range availability please consult your sales office. www.DataSheet4U.com Features D D D D D Power control modes 256 bytes of RAM 16 Kbytes of ROM (83C154) 32 Programmable I/O lines (programmable impedance) Three 16 bit timer/counters (including watchdog and 32 bit timer) D 64 K program memory space D 64 K data memory space D D D D D D Fully static design 0.8µ CMOS process Boolean processor 6 interrupt sources Programmable serial port Temperature range : commercial, industrial, automotive, military Optional D Secret ROM : Encryption D Secret TAG : Identification number MATRA MHS Rev.F (14 Jan. 97) 1 80C154/83C154 Interface Figure 1. Block Diagram www.DataSheet4U.com 2 MATRA MHS Rev.F (14 Jan. 97) 80C154/83C154 Figure 2. Pin Configuration P1.1/T2EX P0.0/A0 P0.1/A1 P0.2/A2 P0.3/A3 P1.0/T2 P1.5 P1.6 VCC P1.4 P1.3 P1.2 NC P0.4/A4 P0.5/A5 P0.6/A6 P0.7/A7 EA 80C154/83C154 P1.7 RST RxD/P3.0 NC TxD/P3.1 INT0/P3.2 INT1/P3.3 T0/P3.4 T1/P3.5 80C154/83C154 NC ALE PSEN P2.7/A14 P2.6/A13 P2.5/A12 P11 /T2EX DIL P14 P13 P12 LCC P10 /T2 A1/P01 A2/P02 A3/P03 A0/P 0 NC VCC www.DataSheet4U.com P15 P16 P17 RST RxD/P30 NC TxD/P31 INT0/P32 INT1/P33 T0/P34 T1/P35 P04 /A4 P05 /A5 P06 /A6 P07 /A7 EA 80C154/83C154 NC ALE PSEN P27 /A15 P26 /A14 P25 /A13 WR/P36 RD/P37 P23 /A11 P20 /A8 P21 /A9 P22 /A10 Flat Pack Diagrams are for reference only. Package sizes are not to scale P24 /A12 XTAL2 XTAL1 V SS NC A10/P2.3 A11/P2.4 A7/P2.0 A8/P2.1 WR/P3.6 RD/P3.7 A9/P2.2 XTAL2 XTAL1 VSS NC MATRA MHS Rev.F (14 Jan. 97) 3 80C154/83C154 Pin Description Vss Circuit Ground Potential. Port 2 Port 2 is an 8 bit bi-directional I/O port with internal pullups. Port 2 pins that have 1’s written to them are pulled high by the internal pullups, and in that state can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (ILL, on the data sheet) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external Program Memory and during accesses to external Data Memory that use 16 bit addresses (MOVX @DPTR). In this application, it uses strong internal pullups when emitting 1’s. During accesses to external Data Memory that use 8 bit addresses (MOVX @Ri), Port 2 emits the contents of the P2 Special Function Register. It also receives the high-order address bits and control signals during program verification in the 83C154. Port 2 can sink or source three LS TTL inputs. It can drive CMOS inputs without external pullups. VCC Supply voltage during normal, Idle, and Power Down operation. Port 0 Port 0 is an 8 bit open drain bi-directional I/O port. Port 0 pins that have 1’s written to them float, and in that state can be used as high-impedance inputs. Port 0 is also the multiplexed low-order address and data bus during accesses to external Program and Data Memory. In this application it uses strong internal pullups when emitting 1’s. Port 0 also outputs the code bytes during program verification in the 83C154. External pullups are required during program verification. Port 0 can sink eight LS TTL inputs. Port 3 Port 3 is an 8 bit bi-directional I/O port with internal pullups. Port 3 pins that have 1’s written to them are Port 1 pulled high by the internal pullups, and in that state can Port 1 is an 8 bit bi-directional I/O.


83C154 80C154 S-83C154


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