Hub Controller. AT43312A Datasheet

AT43312A Controller. Datasheet pdf. Equivalent

AT43312A Datasheet
Recommendation AT43312A Datasheet
Part AT43312A
Description Self- and Bus-Bus-powered USB Hub Controller
Feature AT43312A; Features • • • • • • • • • • • Full Compliance with USB Spec Rev 1.1 Four Downstream Ports Full-spee.
Manufacture ATMEL Corporation
Datasheet
Download AT43312A Datasheet




ATMEL Corporation AT43312A
Features
Full Compliance with USB Spec Rev 1.1
Four Downstream Ports
Full-speed and Low-speed Data Transfers
Bus-powered Controller
Bus-powered or Self-powered Hub Operation
Per Port Overcurrent Monitoring
Individual Port Power Control
USB Connection Status Indicators
5V Operation with On-chip 3.3V Format
32-lead SOIC and LQFP
Green (Pb/Halide-free/RoHS Compliant) Package Options Available
Overview
Introduction
The AT43312A is a 5 port USB hub chip supporting one upstream and four down-
stream ports. The AT43312A connects to an upstream hub or Host/Root Hub via Port0
and the other ports connect to external downstream USB devices. The hub re-trans-
mits the USB differential signal between Port0 and Ports[1:4] in both directions. A USB
hub with the AT43312A can operate as a bus-powered or self-powered through chip’s
power mode configuration pin. In the self-powered mode, port power can be switched
or unswitched. Overcurrent reporting and port power control can be individual or glo-
bal. An on-chip power supply eliminates the need for an external 3.3V supply.
The AT43312A supports the 12-Mb/sec full speed as well as 1.5-Mb/sec slow speed
USB transactions. To reduce EMI, the AT43312A’s oscillator frequency is 6 MHz even
though some internal circuitry operates at 48 MHz.
www.DataSheet4U.com
The AT43312A consists of a Serial Interface Engine, a Hub Repeater, and a Hub
Controller.
Self- and Bus-
powered USB
Hub Controller
AT43312A
SOIC
PWR2
PWR3
PWR4
VCC5
VSS
OSC1
OSC2
LFT
TEST
OVC4
OVC3
OVC2
OVC1
LPSTAT
SELF/BUS
STAT4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 PWR1
31 DP4
30 DM4
29 DP3
28 DM3
27 VSS
26 DP2
25 DM2
24 CEXT
23 DP1
22 DM1
21 DP0
20 DM0
19 STAT1
18 STAT2
17 STAT3
LQFP Top View
DP3
DM4
DP4
PWR1
PWR2
PWR3
PWR4
VCC5
1
2
3
4
5
6
7
8
24 DMO
23 STAT1
22 STAT2
21 STAT3
20 STAT4
19 SELF/BUS
18 LPSTAT
17 OVC1
1255G–USB–05/06
1



ATMEL Corporation AT43312A
The Serial Interface Engine’s
Tasks are:
• Manage the USB communication protocol
• USB signaling detection/generation
• Clock/Data separation, data encoding/decoding, CRC generation/checking
• Data serialization/de-serialization
The Hub Repeater is
Responsible for:
• Providing upstream connectivity between the selected device and the Host
• Managing connectivity setup and tear-down
• Handling bus fault detection and recovery
• Detecting connect/disconnect on each port
The Hub Controller is
Responsible for:
• Hub enumeration
• Providing configuration information to the Host
• Providing status of each port to the Host
• Controlling each port per Host command
Figure 1. Block Diagram
UPSTREAM PORT
PORT 0
HUB
CONTROLLER
SERIAL
INTERFACE
ENGINE
HUB
REPEATER
ENDPOINT 0
ENDPOINT 1
PORT 1
PORT 2
PORT 3
PORT 4
TO DOWNSTREAM DEVICES
Note:
This document assumes that the reader is familiar with the Universal Serial Bus and
therefore only describes the unique features of the AT43312A chip. For detailed informa-
tion about the USB and its operation, the reader should refer to the Universal Serial Bus
Specification Version 1.1, September 23, 1998.
2 AT43312A
1255G–USB–05/06



ATMEL Corporation AT43312A
Pin Assignment
Type: I = Input
O = Output
OD = Output, open drain
B = Bi-directional
V = Power supply, ground
Table 1. 32-lead SOIC Assignment
Pin Signal
1 PWR2
2 PWR3
3 PWR4
4 VCC5
5 VSS
6 OSC1
7 OSC2
8 LFT
9 TEST
10 OVC4
11 OVC3
12 OVC2
13 OVC1
14 LPSTAT
15 SELF/BUS
16 STAT4
Type
O
O
O
V
V
I
O
I
I
I
I
I
I
I
I
O
AT43312A
Pin
Signal
Type
17
STAT3
O
18
STAT2
O
19
STAT1
O
20
DM0
B
21 DP0 B
22
DM1
B
23 DP1 B
24
CEXT
O
25
DM2
B
26 DP2 B
27
VSS
V
28
DM3
B
29 DP3 B
30
DM4
B
31 DP4 B
32
PWR1
O
1255G–USB–05/06
3







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