Serial EEPROMs. AT25256A Datasheet

AT25256A EEPROMs. Datasheet pdf. Equivalent

AT25256A Datasheet
Recommendation AT25256A Datasheet
Part AT25256A
Description (AT25128A / AT25256A) SPI Serial EEPROMs
Feature AT25256A; Features • • • • • • • • • • • • • Serial Peripheral Interface (SPI) Compatible Supports SPI Modes 0.
Manufacture ATMEL Corporation
Datasheet
Download AT25256A Datasheet




ATMEL Corporation AT25256A
Features
Serial Peripheral Interface (SPI) Compatible
Supports SPI Modes 0 (0,0) and 3 (1,1)
Data Sheet Describes Mode 0 Operation
Low-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
20 MHz Clock Rate (5V)
64-byte Page Mode and Byte Write Operation
Block Write Protection
– Protect 1/4, 1/2, or Entire Array
Write Protect (WP) Pin and Write Disable Instructions for
Both Hardware and Software Data Protection
Self-timed Write Cycle (5 ms Max)
High-reliability
– Endurance: 1 Million Write Cycles
– Data Retention: >100 Years
Automotive Grade, Extended Temperature and Lead-free/Halogen-free
Devices Available
8-lead PDIP, 8-lead EIAJ SOIC, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-ball dBGA2 and
8-lead SAP Packages
Die Sales: Wafer Form, Waffle Pack, and Bumped Die
Description
The AT25128A/256A provides 131,072/262,144 bits of serial electrically-erasable
programmable read only memory (EEPROM) organized as 16,384/32,768 words of
8 bits each. The device is optimized for use in many industrial and commercial appli-
cations where low-power and low-voltage operation are essential. The devices are
available in space saving 8-lead PDIP, 8-lead EIAJwwwS.DOataISChee,t48U.c-olmead JEDEC SOIC, 8-
lead TSSOP, 8-ball dBGA2 and 8-lead SAP packages. In addition, the entire family is
available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions.
SPI Serial
EEPROMs
128K (16,384 x 8)
256K (32,768 x 8)
AT25128A
AT25256A
The AT25128A/256A is enabled through the Chip Select pin (CS) and accessed via
a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and
Serial Clock (SCK). All programming cycles are completely self-timed, and no sepa-
rate Erase cycle is required before Write.
8-lead PDIP
8-lead SOIC
Table 1. Pin Configurations
Pin Name
Function
CS Chip Select
CS
SO
WP
GND
1
2
3
4
8 VCC
CS 1
7 HOLD SO 2
6 SCK
WP 3
5 SI
GND 4
8 VCC
7 HOLD
6 SCK
5 SI
SCK
SI
SO
GND
VCC
WP
HOLD
NC
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Write Protect
Suspends Serial Input
No Connect
8-lead TSSOP
8-lead SAP
CS
SO
WP
GND
1
2
3
4
8 VCC
7 HOLD
6 SCK
5 SI
VCC 8
HOLD 7
SCK 6
SI 5
1 CS
2 SO
3 WP
4 GND
8-ball dBGA2 Bottom View
VCC
HOLD
SCK
SI
8
7
6
5
1 CS
2 SO
3 WP
4 GND
Bottom View
3368H–SEEPR–8/05
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ATMEL Corporation AT25256A
Block Write protection is enabled by programming the status register with top ¼, top ½
or entire array of write protection. Separate Program Enable and Program Disable
instructions are provided for additional data protection. Hardware data protection is pro-
vided via the WP pin to protect against inadvertent write attempts to the status register.
The HOLD pin may be used to suspend any serial communication without resetting the
serial sequence.
Absolute Maximum Ratings*
Operating Temperature......................................−55°C to +125°C
Storage Temperature .........................................−65°C to +150°C
Voltage on Any Pin
with Respect to Ground ........................................ −1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions beyond those indicated in the operational sec-
tions of this specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect device reliability.
Figure 1. Block Diagram
16384/32768 x 8
Table 2. Pin Capacitance(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted)
Symbol Test Conditions
Max
Units
Conditions
COUT
CIN
Note:
Output Capacitance (SO)
Input Capacitance (CS, SCK, SI, WP, HOLD)
1. This parameter is characterized and is not 100% tested.
8 pF VOUT = 0V
6 pF VIN = 0V
2 AT25128A/256A
3368H–SEEPR–8/05



ATMEL Corporation AT25256A
AT25128A/256A
Table 3. DC Characteristics
Applicable over recommended operating range from TAI = 40°C to +85°C, VCC = +1.8V to +5.5V,
TAE = 40°C to +125°C, VCC = +1.8V to +5.5V(unless otherwise noted)
Symbol Parameter
Test Condition
Min Typ
Max
Units
VCC1
VCC2
VCC3
ICC1
Supply Voltage
Supply Voltage
Supply Voltage
Supply Current
VCC = 5.0V at 20 MHz, SO = Open,
Read
1.8 5.5 V
2.7 5.5 V
4.5 5.5 V
9.0 10.0 mA
ICC2
Supply Current
VCC = 5.0V at 10 MHz,
SO = Open, Read, Write
5.0 7.0 mA
ICC3
Supply Current
VCC = 5.0V at 1 MHz,
SO = Open, Read, Write
2.2 3.5 mA
ISB1
Standby Current
VCC = 1.8V, CS = VCC
ISB2
Standby Current
VCC = 2.7V, CS = VCC
ISB3
Standby Current
VCC = 5.0V, CS = VCC
IIL
Input Leakage
VIN = 0V to VCC
IOL
VIL(1)
Output Leakage
Input Low-voltage
VIN = 0V to VCC, TAC = 0°C to 70°C
VIH(1)
Input High-voltage
VOL1
VOH1
Output Low-voltage
Output High-voltage
3.6 VCC 5.5V
IOL = 3.0 mA
IOH = 1.6 mA
VOL2
VOH2
Note:
Output Low-voltage
Output High-voltage
1.8V VCC 3.6V
IOL = 0.15 mA
IOH = 100 µA
1. VIL and VIH max are reference only and are not tested.
Table 4. AC Characteristics
3.0
3.0
1.0
VCC x 0.7
VCC 0.8
VCC 0.2
0.2 3.0
0.5 3.0
2.0 5.0
3.0
3.0
VCC x 0.3
VCC + 0.5
0.4
0.2
µA
µA
µA
µA
µA
V
V
V
V
V
V
Applicable over recommended operating range from TAI = 40°C to + 85°C, TAE = 40°C to +125°C, VCC = As Specified,
CL = 1 TTL Gate and 30 pF (unless otherwise noted)
Symbol
Parameter
Voltage
Min Max Units
fSCK SCK Clock Frequency
4.55.5
2.75.5
1.85.5
0 20
0 10 MHz
05
tRI Input Rise Time
4.55.5
2.75.5
1.85.5
2
2 µs
2
tFI Input Fall Time
4.55.5
2.75.5
1.85.5
2
2 µs
2
tWH SCK High Time
4.55.5
2.75.5
1.85.5
20
40
80
ns
3368H–SEEPR–8/05
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