Document
Sanken Power Devices from Allegro MicroSystems
STR-A6259H
Universal-Input 13 W 100 kHz Flyback Switching Regulators
S Re w it gu chi lat ng ors
Soft start and low start-up current; start-up circuit disabled in operation Auto-burst stand-by (intermittent operation) input power <0.1 W at no load Built-in constant-voltage/constant current (CV/CC) Multiple protections: • Pulse-by-pulse overcurrent protection (OCP) • Overload protection (OLP) with auto restart • Latching overvoltage protection (OVP) • Undervoltage lockout (UVLO) with hysteresis • Latching thermal shutdown (TSD)
All performance characteristics given are typical values for circuit or system baseline design only and are at the nominal operating voltage and an ambient temperature of +25°C, unless otherwise stated.
Datasheet 28103.44-6b
The STR-A6259H is a 100 kHz PWM topology (with ±5% frequency jittering for minimum EMI) regulator specifically designed to satisfy the requirements for increased integration and reliability Package DIP-8 in flyback converters. It incorporates a primary control and drive circuit with an avalanche-rated power MOSFET. Covering the power range from below 17 watts for a 230 VAC input, or to 13 watts for a universal (85 to 264 VAC) Approximate Scale 1:1 input, this device can be used in a wide range of applications, from DVD players and VCR player/recorders to ac adapters for cellular phones and digital cameras. An auto-burst standby function reduces power consumption at light load, while multiple protections, including the avalanche-energy guaranteed MOSFET, FEATURES AND BENEFITS provide high reliability of system design. 100 kHz PWM with ±5% frequency jittering for EMI noise Cycle-by-cycle current limiting, undervoltage lockout with filtering cost reduction hysteresis, overvoltage protection, and thermal shutdown protect the power supply during the normal overload and fault conditions. www.DataSheet4U.com Rugged 650 V avalanche-rated MOSFET: Overvoltage protection and thermal shutdown are latched after a • Simplified surge absorption short delay. The latch may be reset by cycling the input supply. Low start-up current and a low-power standby mode selected • No VDSS derating required from the secondary circuit completes a comprehensive suite of Low RDS(on) : 6 Ω maximum features. Auto-burst mode for stand-by operation or light loads; less It is provided in an 8-pin mini-DIP plastic package with pin 6 removed. The leadframe plating is pure Sb, and the package transformer audible noise complies with RoHS. Built-in leading edge blanking
Always order by complete part number, e.g.:
STR-A6259H
STR-A6259H Universal Input 13 W 100 kHz Flyback Switching Regulators
FUNCTIONAL BLOCK DIAGRAM AND TERMINAL ASSIGNMENTS
Vcc
5
8
D D
RESET OVP
32V 7.2V
R
Internal BIAS
UVLO
13.4V/10V
Istartup =1.1mA
7
TSD
125°C
Delay
10 µs
S Q
Drive
PWM OSC
RQ S
1
S/OCP
CV/CC
Feedback Control Soft Start FM/SS 2 OCP Frequency Modulation OLP LEB
4
FB/CC /OLP
3
GND
Number 1 2 3 4
Name S/OCP FM/SS GND FB /CC/OLP
Description Source/OCP terminal FM/Soft start terminal Ground terminal FB/CC/OLP terminal
Functions MOSFET Source/Overcurrent protection Capacitor connection terminal for frequency jitter and soft start. Ground Input of constant voltage control signal / constant current operation control signal / over load protection signal Input of power supply for control circuit MOSFET drain / Input of startup current
5 7 8
VCC D
Power supply terminal Drain terminals
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036
S Re w it gu chi lat ng ors
2
STR-A6259H Universal Input 13 W 100 kHz Flyback Switching Regulators
ABSOLUTE MAXIMUM RATINGS at TA = 25°C Characteristic Drain Current1 Maximum Switching Current Single Pulse Avalanche Energy2 S/OCP Terminal Voltage Controller (MIC) Input Voltage FB/CC/OLP Terminal Voltage FM Terminal Voltage MOSFET Power Dissipation3,4 Controller (MIC) Power Dissipation5 Operating Internal Frame Storage Temperature Channel Junction Temperature
1Refer
Symbol IDpeak IDMAX EAS VOCP Vcc VFB VFM PD1 PD2 TF Top Tstg TJ
Terminal 8-1 8-1 8-1 1-3 5-3 4-3 2-3 8-1 5-3 For Vcc×Icc Refer to TOP Single Pulse
Note VS/OCP = 0.83 V with reference to GND, TA = –20 to 125°C Single Pulse VDD = 99 V, L = 20 mH, IL = 1.8 A
Temperature6
Operating Ambient Temperature
to figure 1 2Refer to figure 3 3Refer to figure 5 4Mounted on 15 x 15 mm printed circuit board 5Refer to figure 6 6Measured at the root of terminal 3
Figure 1 – MOSFET Safe Operating Area Derating Curve
100
Figure 2 – MOSFET Safe Operating Area Drain Current versus Voltage
10.00
Safe Operating Area Temperature Derating Coefficient (%)
80
0.
Drain Current, ID (A)
1.00
60
40
it lim (on) t S n re R D ur to C ue d
0.10
20 Refer to figure 1 for MOSFET SOA temperature derating coefficient 0 0 25 50 75 100 125 150 Temperature, TF (°C) 0.01 1 10 100 1000
Drain-to-Source Voltage, VDS (V)
115 Northeast Cutoff, Box 15036 Worcester, Massa.