PowerTrench MOSFET. FDMB506P Datasheet

FDMB506P Datasheet PDF, Equivalent


Part Number

FDMB506P

Description

P-Channel 1.8V Logic Level PowerTrench MOSFET

Manufacture

Fairchild Semiconductor

Total Page 6 Pages
PDF Download
Download FDMB506P Datasheet


FDMB506P Datasheet
December 2005
FDMB506P
P-Channel 1.8V Logic Level PowerTrenchMOSFET
General Description
This P-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench process that
has been especially tailored to minimize the on-state
resistance and yet maintain low gate charge for
superior switching performance. These devices are
well suited for portable electronics applications.
Applications
Load switch
DC/DC Conversion
Features
–6.8 A, –20V. RDS(ON) = 30 m@ VGS = –4.5V
RDS(ON) = 38 m@ VGS = –2.5V
RDS(ON) = 70 m@ VGS = –1.8V
Low profile – 0.8 mm maximum
Fast switching
RoHS compliant
PIN 1
GATE
SOURCE
www.DataSheet4U.com
MicroFET
3x1.9
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
VDSS
VGSS
ID
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1a)
PD Power Dissipation
(Note 1a)
TJ, TSTG
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJA Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
506 FDMB506P
7’’
S5
D6
D7
D8
4G
3D
2D
1D
Ratings
–20
±8
–6.8
70
1.9
–55 to +150
65
208
Tape width
8mm
Units
V
V
A
W
°C
°C/W
Quantity
3000 units
2005 Fairchild Semiconductor Corporation
FDMB506P Rev C1(W)

FDMB506P Datasheet
Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
BVDSS
TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSS Gate–Body Leakage
VGS = 0 V,
ID = –250 µA
ID = –250 µA, Referenced to 25°C
VDS = –16 V,
VGS = ± 8 V,
VGS = 0 V
VDS = 0 V
–20
–13
V
mV/°C
–1
±100
µA
nA
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
VGS(th)
TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
gFS Forward Transconductance
VDS = VGS,
ID = –250 µA
ID = –250 µA, Referenced to 25°C
VGS = –4.5 V, ID = –6.8 A
VGS = –2.5 V, ID = –2.5 A
VGS = –1.8 V, ID = –1.8 A
VGS= –4.5 V, ID = –6.8 A, TJ=125°C
VDS = –5 V, ID = –6.8 A
–0.4 –0.7 –1.5
V
3 mV/°C
25 30
30 38
40 70
36 44
26
m
S
Dynamic Characteristics
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
VDS = –10 V, V GS = 0 V,
f = 1.0 MHz
2216
351
167
2960
470
260
pF
pF
pF
Switching Characteristics
td(on) Turn–On Delay Time
tr Turn–On Rise Time
td(off) Turn–Off Delay Time
tf Turn–Off Fall Time
Qg Total Gate Charge
Qgs Gate–Source Charge
Qgd Gate–Drain Charge
(Note 2)
VDD = –10 V, ID = –1 A,
VGS = –4.5 V, RGEN = 6
VDS = –10 V, ID = –6.8 A,
VGS = –4.5 V
14 25
8 16
175 280
80 128
21 30
3.5
4.5
ns
ns
ns
ns
nC
nC
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
VGS = 0 V,
IS = –0.8 A(Note 2)
Voltage
trr
Diode Reverse Recovery Time
IF = –6.8 A,
Qrr Diode Reverse Recovery Charge diF/dt = 100 A/µs
1.6
–0.6 –1.2
26 48
12 22
A
V
nS
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 50°C/W when
mounted on a 1in2 pad
of 2 oz copper
b) 160°C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDMB506P Rev C1(W)


Features Datasheet pdf FDMB506P December 2005 FDMB506P P-Chan nel 1.8V Logic Level PowerTrench MOS FET General Description This P-Channel MOSFET is produced using Fairchild Semi conductor’s advanced PowerTrench proc ess that has been especially tailored t o minimize the on-state resistance and yet maintain low gate charge for superi or switching performance. These devices are well suited for portable electroni cs applications. Features • –6.8 A , –20V. RDS(ON) = 30 mΩ @ VGS = – 4.5V RDS(ON) = 38 mΩ @ VGS = –2.5V RDS(ON) = 70 mΩ @ VGS = –1.8V • L ow profile – 0.8 mm maximum • Fast switching Applications • Load switch • DC/DC Conversion • RoHS complia nt PIN 1 GATE S D www.DataSheet4U.co m 5 6 7 8 4 3 2 1 G D D D SOURCE D D MicroFET 3x1.9 Absolute Maximum Ra tings Symbol VDSS VGSS ID PD TJ, TSTG D rain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulse d Power Dissipation TA=25oC unless oth erwise noted Parameter Ratings –20 ±8 (Note 1a) Units V V A W °C –6.8 70 1.9 –55 to +150 (Note 1.
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