CFK2062-P5

CFK2062-P5 RNS@š@RNU@gh¡ KSP@‡b“@pžˆ˜@g„a™@fet www.DataSheet4U.com mŒ“ŒŸ@b˜„‡…„”‡L@i”†N@QPWYU@r†‘’ˆ @r‡NL@h›™š”L@tˆŸ„™@WWPYY tˆ’Z@RXQNYXXNTVPP@@f„ŸZ@RXQNYXXNTVQU@@žžžN“Œ“ŒŸ…˜„‡…„”‡N†“ ÐRPPU@mŒ“ŒŸ@b˜„‡…„”‡L@i”†N CFK2062-P5 Product Specifications July 1997 (1 of 4) Features t High Gain t +30 dBm Power Output t Proprietary Power FET Process t >40% Linear Power Added Efficiency t Surface Mount SO-8 Power Package Applications t ISM Band Base Stations and Terminals t RF ID/POS Base Stations t Wireless Local Loop Description The CFK2062-P5 is a high-gain FET intended for driver amplifier applications in high-power systems, and output stage usage in medium power applications at power levels up to +30 dBm. The device is easily matched and provides excellent 2.3 to 2.5 GHz +30 dBm Power GaAs FET Package Diagram G GND GND G 1 2 3 4 Back Plane is Source 8 7 6 5 D GND GND D linearity at 1 Watt. Manufactured in Celeritek’s proprietary power FET process, this device is assembled in an industry standard surface mount SO-8 power package that is compatible with high volume, automated board assembly techniques. Specifications (TA = 25°C) The following specifications are guaranteed at room temperature in Celeritek test fixture at 2.45 GHz. Parameters Conditions Min Typ Max Units SO-8 Power Package Physical Dimensions Vd = 8V, Id = 400 mA (Quiescent) P-1dB SSG 3rd Order Products (1) Efficiency @ P1dB Vd = 5V, Id = 600 mA (Quiescent) P-1dB SSG Parameters Conditions 30.0 31.0 12....