Document
DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization
April 2007
DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization
General Description
The DS25BR110 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. A fully differential signal path ensures exceptional signal integrity and noise immunity. The DS25BR110 features four levels of receive equalization (EQ), making it ideal for use as a receiver device. Other LVDS devices with similar IO characteristics include the following products. The DS25BR120 features four levels of pre-emphasis for use as an optimized driver device, while the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device. The DS25BR150 is a buffer/repeater with the lowest power consumption and does not feature transmit pre-emphasis nor receive equalization. Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count, and further minimize board space.
Features
■ DC - 3.125 Gbps low jitter, high noise immunity, low power
operation
■ Four levels of receive equalization reduce ISI jitter ■ On-chip 100Ω input and output termination minimizes
insertion and return losses, reduces component count and minimizes board space ■ 7 kV ESD on LVDS I/O pins protects adjoining components ■ Small 3 mm x 3 mm 8-LLP space saving package
Applications
■ Clock and data buffering ■ Metallic cable equalization ■ FR-4 equalization
Typical Application
30005310
© 2007 National Semiconductor Corporation
300053
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DS25BR110
Block Diagram
30005303
Pin Diagram
30005306
Pin Descriptions
Pin Name EQ0 IN+ INEQ1 NC OUTOUT+ VCC GND Pin Name 1 2 3 4 5 6 7 8 DAP Pin Type Input Input Input Input NA Output Output Power Power Pin Description Equalizer select pin. Non-inverting LVDS input pin. Inverting LVDS input pin. Equalizer select pin. "NO CONNECT" pin. Inverting LVDS output pin. Non-inverting LVDS Output pin. Power supply pin. Ground pad (DAP - die attach pad)
Control Pins (EQ0 and EQ1) Truth Tables
EQ1 0 0 1 1 EQ0 0 1 0 1 Equalization Level Off Low (Approx. 4 dB at 1.56 GHz) Medium (Approx. 8 dB at 1.56 GHz) High (Approx. 16 dB at 1.56 GHz)
Ordering Codes and Configurations
NSID DS25BR100TSD DS25BR110TSD DS25BR120TSD DS25BR150TSD Function Buffer/Repeater Receiver Driver Buffer/Repeater Available Equalization Levels Low / Medium Off / Low / Medium / High NA NA Available Pre-emphasis Levels Off / Medium NA Off / Low / Medium / High NA
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DS25BR110
Absolute Maximum Ratings (Note 4)
If Military/Aerospace specified devi.