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X9260

Intersil Corporation

Dual Digitally-Controlled Potentiometers

® X9260 Dual Supply/Low Power/256-Tap/SPI bus Data Sheet August 29, 2006 FN8170.3 Dual Digitally-Controlled (XDCP™) Po...


Intersil Corporation

X9260

File Download Download X9260 Datasheet


Description
® X9260 Dual Supply/Low Power/256-Tap/SPI bus Data Sheet August 29, 2006 FN8170.3 Dual Digitally-Controlled (XDCP™) Potentiometers FEATURES Dual–Two Separate Potentiometers 256 Resistor Taps/pot–0.4% Resolution SPI Serial Interface for Write, Read, and Transfer Operations of the Potentiometer Wiper Resistance, 100Ω typical @ V+ = 5V, V- = -5V 4 Nonvolatile Data Registers for Each Potentiometer Nonvolatile Storage of Multiple Wiper Positions Power-on Recall. Loads Saved Wiper Position on Power-up. Standby Current <5µA Max VCC: 2.7V to 5.5V Operation 50kΩ, 100kΩ Versions of End to End Resistance 100 yr. Data Retention Endurance: 100,000 Data Changes per Bit per Register 24 Ld SOIC Low Power CMOS www.DataSheet4U.com Power Supply VCC = 2.7V to 5.5V V+ = 2.7V to 5.5V V- = -2.7V to -5.5V Pb-Free Plus Anneal Available (RoHS Compliant) FUNCTIONAL DIAGRAM VCC V+ DESCRIPTION The X9260 integrates 2 digitally controlled potentiometer (XDCP) on a monolithic CMOS integrated circuit. The digitally controlled potentiometer is implemented using 255 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches. The position of the wiper on the array is controlled by the user through the SPI bus interface. Each potentiometer has associated with it a volatile Wiper Counter Register (WCR) and a four nononvolatile Data Registers that can be directly written to and read by the user. The contents of the W...




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