X9261 Potentiometers Datasheet

X9261 Datasheet, PDF, Equivalent


Part Number

X9261

Description

Dual Digitally-Controlled Potentiometers

Manufacture

Intersil Corporation

Total Page 20 Pages
Datasheet
Download X9261 Datasheet


X9261
®
Data Sheet
X9261
Single Supply/Low Power/256-Tap/SPI Bus
October 12, 2006
FN8171.4
Dual Digitally-Controlled (XDCP™)
Potentiometers
FEATURES
• Dual–Two Separate Potentiometers
• 256 Resistor Taps/pot–0.4% Resolution
• SPI Serial Interface for Write, Read, and Transfer
Operations of the Potentiometer Single Supply
Device
• Wiper Resistance, 100Ω typical @ VCC = 5V
• 4 Nonvolatile Data Registers for Each
Potentiometer
• Nonvolatile Storage of Multiple Wiper Positions
• Power-on Recall Loads Saved Wiper Position on
Power-up.
• Standby Current < 5µA Max
• 50kΩ, 100kΩ Versions of End to End Resistance
• 100 yr. Data Retention
• Endurance: 100,000 Data Changes per Bit per
Register
• 24 Ld SOIC, 24 Ld TSSOP
• Low Power CMOS
www.DataSheet4U.com
Power Supply VCC =
Pb-Free Plus Anneal
5V ±10%
Available
(RoHS
Compliant)
FUNCTIONAL DIAGRAM
DESCRIPTION
The X9261 integrates 2 digitally controlled
potentiometer (XDCP) on a monolithic CMOS
integrated circuit.
The digital controlled potentiometer is implemented
using 255 resistive elements in a series array.
Between each element are tap points connected to the
wiper terminal through switches. The position of the
wiper on the array is controlled by the user through the
SPI bus interface. Each potentiometer has associated
with it a volatile Wiper Counter Register (WCR) and
four non-volatile Data Registers that can be directly
written to and read by the user. The contents of the
WCR controls the position of the wiper on the resistor
array though the switches. Powerup recalls the
contents of the default Data Register (DR0) to the
WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
VCC
RH0
RH1
SPI
Bus
Interface
Address
Data
Status
Bus
Interface
and Control
Write
Read
Transfer
Inc/Dec
Control
Power-on Recall
Wiper Counter
Register (WCR)
Data Registers
(DR0-DR3)
VSS
RW0 RL0 RW1 RL1
50kΩ or 100kΩ versions
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

X9261
X9261
Ordering Information
PART NUMBER
X9261US24
PART
MARKING
X9261US
VCC LIMITS
(V) RTOTAL (kΩ) TEMP RANGE (°C)
PACKAGE
5 ±10%
50
0 to 70
24 Ld SOIC (300 mil)
PKG.
DWG. #
M24.3
X9261US24Z (Note)
X9261US Z
0 to 70
24 Ld SOIC (300 mil) (Pb-free) M24.3
X9261UV24
X9261UV
0 to 70
24 Ld TSSOP (4.4mm)
MDP0044
X9261UV24Z (Note)
X9261UV Z
0 to 70
24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
DETAILED FUNCTIONAL DIAGRAM
VCC
HOLD
CS
SCK
SO
SI
A0
A1
WP
INTERFACE
AND
CONTROL
CIRCUITRY
8
Data
RH0 RL0RW0
Power-on
Recall
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Pot 0
50kΩ and 100kΩ
256-taps
Power-on
Recall
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 1
VSS
CIRCUIT LEVEL APPLICATIONS
• Vary the gain of a voltage amplifier
• Provide programmable dc reference voltages for
comparators and detectors
• Control the volume in audio circuits
• Trim out the offset voltage error in a voltage ampli-
fier circuit
• Set the output voltage of a voltage regulator
• Trim the resistance in Wheatstone bridge circuits
• Control the gain, characteristic frequency and
Q-factor in filter circuits
• Set the scale factor and zero point in sensor signal
conditioning circuits
2
RL1 RH1 RW1
• Vary the frequency and duty cycle of timer ICs
• Vary the dc biasing of a pin diode attenuator in RF
circuits
• Provide a control variable (I, V, or R) in feedback
circuits
FN8171.4
October 12, 2006


Features ® X9261 Single Supply/Low Power/256-Ta p/SPI Bus Data Sheet October 12, 2006 F N8171.4 Dual Digitally-Controlled (XDC P™) Potentiometers FEATURES • Dual Two Separate Potentiometers • 256 R esistor Taps/pot–0.4% Resolution • SPI Serial Interface for Write, Read, a nd Transfer Operations of the Potentiom eter Single Supply Device • Wiper Res istance, 100Ω typical @ VCC = 5V • 4 Nonvolatile Data Registers for Each Po tentiometer • Nonvolatile Storage of Multiple Wiper Positions • Power-on R ecall Loads Saved Wiper Position on Pow er-up. • Standby Current < 5µA Max 50kΩ, 100kΩ Versions of End to End Resistance • 100 yr. Data Retention • Endurance: 100,000 Data Changes per Bit per Register • 24 Ld SOIC, 24 Ld TSSOP • Low Power CMOS • Power Sup ply VCC = 5V ±10% www.DataSheet4U.com • Pb-Free Plus Anneal Available (RoHS Compliant) FUNCTIONAL DIAGRAM VCC DES CRIPTION The X9261 integrates 2 digital ly controlled potentiometer (XDCP) on a monolithic CMOS integrated circuit. The digital controlled potent.
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