X9408 Datasheet: Low Noise/Low Power/2-Wire Bus





X9408 Low Noise/Low Power/2-Wire Bus Datasheet

Part Number X9408
Description Low Noise/Low Power/2-Wire Bus
Manufacture Intersil Corporation
Total Page 21 Pages
PDF Download Download X9408 Datasheet PDF

Features: ® X9408 Low Noise/Low Power/2-Wire Bus Data Sheet September 19, 2005 FN8191.2 Quad Digitally Controlled (XDCP™) P otentiometers FEATURES • • • • • • • • Four potentiometers in one package 64 resistor taps per potent iometer 2-wire serial interface Wiper r esistance, 40Ω typical at 5V Four non volatile data registers for each pot No nvolatile storage of wiper position Sta ndby current < 1µA max (total package) VCC = 2.7V to 5.5V operation V+ = 2.7V to 5.5V V- = –2.7V to -5.5V 10kΩ, 2.5kΩ end to end resistances High rel iability —Endurance–100,000 data ch anges per bit per register —Register data retention–100 years 24 Ld SOIC, 24 Ld TSSOP, 24 Ld PDIP packages Pb-fre e plus anneal available (RoHS compliant ) DESCRIPTION The X9408 integrates fou r digitally controlled potentiometers ( XDCP) on a monolithic CMOS integrated c ircuit. The digital controlled potentio meter is implemented using 63 resistive elements in a series array. Between each element are tap points connected to the wiper terminal th.

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®
Data Sheet
X9408
Low Noise/Low Power/2-Wire Bus
September 19, 2005
FN8191.2
Quad Digitally Controlled (XDCP™)
Potentiometers
FEATURES
• Four potentiometers in one package
• 64 resistor taps per potentiometer
• 2-wire serial interface
• Wiper resistance, 40typical at 5V
• Four nonvolatile data registers for each pot
• Nonvolatile storage of wiper position
• Standby current < 1µA max (total package)
• VCC = 2.7V to 5.5V operation
V+ = 2.7V to 5.5V
V- = –2.7V to -5.5V
• 10k, 2.5kend to end resistances
• High reliability
—Endurance–100,000 data changes per bit per
register
—Register data retention–100 years
• 24 Ld SOIC, 24 Ld TSSOP, 24 Ld PDIP packages
• Pb-free plus anneal available (RoHS compliant)
DESCRIPTION
The X9408 integrates four digitally controlled
potentiometers (XDCP) on a monolithic CMOS
integrated circuit.
The digital controlled potentiometer is implemented
using 63 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the 2-wire
bus interface. Each potentiometer has associated with
it a volatile Wiper Counter Register (WCR) and four
non-volatile Data Registers that can be directly written
to and read by the user. The contents of the WCR
controls the position of the wiper on the resistor array
though the switches. Powerup recalls the contents of
the default data register (DR0) to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
BLOCK DIAGRAM
www.DataSheet4U.com
VCC
VSS
V+
V-
WP
SCL
SDA
A0
A1
A2
A3
Interface
and
Control
Circuitry
8
Data
Pot 0
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
VH0/RH0
VL0/RL0
VW0/RW0
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 2
VH2/RH2
VL2/RL2
VW2/RW2
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
VW1/RW1
Resistor
Array
Pot 1
VH1/RH1
VL1/RL1
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
VW3/RW3
Resistor
Array
Pot 3
VH3/RH3
VL3/RL3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

                    
                    






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