Controlled Potentiometer. X9410 Datasheet

X9410 Datasheet PDF, Equivalent


Part Number

X9410

Description

Dual Digitally Controlled Potentiometer

Manufacture

Intersil Corporation

Total Page 21 Pages
PDF Download
Download X9410 Datasheet PDF


X9410 Datasheet
®
Data Sheet
X9410
Low Noise/Low Power/SPI Bus
October 12, 2006
FN8193.2
Dual Digitally Controlled Potentiometer
(XDCP™)
FEATURES
• Two potentiometers per package
• SPI serial interface
• Register oriented format
- Direct read/write/transfer wiper positions
- Store as many as four positions per
potentiometer
• Power supplies
- VCC = 2.7V to 5.5V
- V+ = 2.7V to 5.5V
- V- = -2.7V to -5.5V
• Low power CMOS
- Standby current < 1µA
- High reliability
- Endurance - 100,000 data changes per bit per
register
- Register data retention - 100 years
• 8-bytes of nonvolatile EEPROM memory
www.DataSheet4U.com 10kresistor arrays
• Resolution: 64 taps each pot
• 24 Ld SOIC, 24 Ld TSSOP, and 24 Ld plastic DIP
packages
• Pb-free plus anneal available (RoHS compliant)
BLOCK DIAGRAM
VCC
VSS
V+
V-
HOLD
CS
SCK
SO
SI
A0
A1
WP
Interface
and
Control
Circuitry
8
Data
DESCRIPTION
The X9410 integrates two digitally controlled
potentiometers (XDCPs) on a monolithic CMOS
integrated circuit.
The digitally controlled potentiometer is implemented
using 63 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the SPI
serial bus interface. Each potentiometer has
associated with it a volatile Wiper Counter Register
(WCR) and four nonvolatile Data Registers (DR0:DR3)
that can be directly written to and read by the user.
The contents of the WCR controls the position of the
wiper on the resistor array through the switches.
Power-up recalls the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two-terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
Pot 0
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
VH0/RH0
VL0/RL0
VW0/RW0
Pot 1
R0 R1
R2 R3
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot1
VW1/RW1
VH1/RH1
VL1/RL1
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

X9410 Datasheet
X9410
Ordering Information
PART NUMBER
POTENTIOMETER
VCC LIMITS ORGANIZATION TEMP RANGE
PART MARKING (V)
(k)
(°C)
PACKAGE
PKG. DWG. #
X9410YS24I
X9410YS I
5 ±10%
2.5
-40 to 85 24 Ld SOIC (300 mil)
M24.3
X9410YS24IZ (Note)
X9410YS ZI
-40 to 85 24 Ld SOIC (300 mil) (Pb-free) MDP0027
X9410WP24I
X9410WP I
10 -40 to 85 24 Ld PDIP
E24.6
X9410WS24I*
X9410WS I
-40 to 85 24 Ld SOIC (300 mil)
M24.3
X9410WS24IZ* (Note) X9410WS ZI
-40 to 85 24 Ld SOIC (300 mil) (Pb-free) MDP0027
X9410WV24I*
X9410WV I
-40 to 85 24 Ld TSSOP (4.4mm)
MDP0044
X9410WV24IZ* (Note) X9410WV ZI
-40 to 85 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
X9410YS24I-2.7
X9410YS G
2.7 to 5.5
2.5
-40 to 85 24 Ld SOIC (300 mil)
M24.3
X9410YS24IZ-2.7 (Note) X9410YS ZG
-40 to 85 24 Ld SOIC (300 mil) (Pb-free) MDP0027
X9410WP24I-2.7
X9410WP G
10 -40 to 85 24 Ld PDIP
E24.6
X9410WS24I-2.7*
X9410WS G
-40 to 85 24 Ld SOIC (300 mil)
M24.3
X9410WS24IZ-2.7* (Note) X9410WS ZG
-40 to 85 24 Ld SOIC (300 mil) (Pb-free) MDP0027
X9410WV24-2.7*
X9410WV F
0 to 70 24 Ld TSSOP (4.4mm)
MDP0044
X9410WV24Z-2.7* (Note) X9410WV ZF
0 to 70 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
X9410WV24I-2.7*
X9410WV G
-40 to 85 24 Ld TSSOP (4.4mm)
MDP0044
X9410WV24IZ-2.7* (Note) X9410WV ZG
-40 to 85 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PIN DESCRIPTIONS
Host Interface Pins
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked
out by the falling edge of the serial clock.
Serial Input
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
Serial Clock (SCK)
The SCK input is used to clock data into and out of the
X9410.
Chip Select (CS)
When CS is HIGH, the X9410 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9410, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
Hold (HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
be brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while
SCK is LOW. If the pause feature is not used, HOLD
should be held HIGH at all times.
Device Address (A0 - A1)
The address inputs are used to set the least significant
2 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
address input in order to initiate communication with
the X9410. A maximum of 4 devices may occupy the
SPI serial bus.
2 FN8193.2
October 12, 2006


Features Datasheet pdf ® X9410 Low Noise/Low Power/SPI Bus Da ta Sheet October 12, 2006 FN8193.2 Dua l Digitally Controlled Potentiometer (X DCP™) FEATURES • Two potentiometers per package • SPI serial interface Register oriented format - Direct re ad/write/transfer wiper positions - Sto re as many as four positions per potent iometer • Power supplies - VCC = 2.7V to 5.5V - V+ = 2.7V to 5.5V - V- = -2. 7V to -5.5V • Low power CMOS - Standb y current < 1µA - High reliability - E ndurance - 100,000 data changes per bit per register - Register data retention - 100 years • 8-bytes of nonvolatile EEPROM memory www.DataSheet4U.com • 10kΩ resistor arrays • Resolution: 64 taps each pot • 24 Ld SOIC, 24 Ld TSSOP, and 24 Ld plastic DIP packages Pb-free plus anneal available (RoHS compliant) BLOCK DIAGRAM VCC VSS V+ VHO LD CS SCK SO SI A0 A1 WP DESCRIPTION T he X9410 integrates two digitally contr olled potentiometers (XDCPs) on a monol ithic CMOS integrated circuit. The digitally controlled potentiometer is implemented usin.
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