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AS4LC4M16 Datasheet, Equivalent, 16 DRAM.4 MEG x 16 DRAM 4 MEG x 16 DRAM |
| Part | AS4LC4M16 |
|---|---|
| Description | 4 MEG x 16 DRAM |
| Feature | DRAM
Austin Semiconductor, Inc. 4 MEG x 16 DRAM Extended Data Out (EDO) DRAM FE ATURES • Single +3. 3V ±0. 3V power su pply. • Industry-standard x16 pinout, timing, functions, and package. • 12 row, 10 column addresses • High-perf ormance CMOS silicon-gate process • A ll inputs, outputs and clocks are LVTTL -compatible • Extended Data-Out (EDO) PAGE MODE access • 4,096-cycle CAS-B EFORE-RAS (CBR) REFRESH distributed acr oss 64ms • Optional self refresh (S) for low-power data retention • Level 1 Moisture Sensitivity Rating, JEDEC J- STD-020 AS4LC4M16 PIN ASSIGNMENT (Top View) 50-Pin TSOP (DG) OPTIONS . |
| Manufacture | Austin Semiconductor |
| Datasheet |
| Part | AS4LC4M16 |
|---|---|
| Description | 4 MEG x 16 DRAM |
| Feature | DRAM
Austin Semiconductor, Inc. 4 MEG x 16 DRAM Extended Data Out (EDO) DRAM FE ATURES • Single +3. 3V ±0. 3V power su pply. • Industry-standard x16 pinout, timing, functions, and package. • 12 row, 10 column addresses • High-perf ormance CMOS silicon-gate process • A ll inputs, outputs and clocks are LVTTL -compatible • Extended Data-Out (EDO) PAGE MODE access • 4,096-cycle CAS-B EFORE-RAS (CBR) REFRESH distributed acr oss 64ms • Optional self refresh (S) for low-power data retention • Level 1 Moisture Sensitivity Rating, JEDEC J- STD-020 AS4LC4M16 PIN ASSIGNMENT (Top View) 50-Pin TSOP (DG) OPTIONS . |
| Manufacture | Austin Semiconductor |
| Datasheet |
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