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AT25FS010 Dataheets PDF



Part Number AT25FS010
Manufacturers ATMEL Corporation
Logo ATMEL Corporation
Description High Speed Small Sectored SPI Flash Memory
Datasheet AT25FS010 DatasheetAT25FS010 Datasheet (PDF)

Features • Serial Peripheral Interface (SPI) Compatible • Supports SPI Modes 0 (0,0) and 3 (1,1) – Datasheet describes Mode 0 Operation • 50 MHz Clock Rate • Byte Mode and Page Mode Program (1 to 256 Bytes) Operations • Sector/Block/Page Architecture – 256 byte Pages per Sector – Eight 4 Kbyte Sectors per Block – Four uniform 32 Kbyte Blocks Self-timed Sector, Block and Chip Erase Product Identification Mode with JEDEC Standard Low-voltage Operation – 2.7V (VCC = 2.7V to 3.6V) Hardware and Soft.

  AT25FS010   AT25FS010


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Features • Serial Peripheral Interface (SPI) Compatible • Supports SPI Modes 0 (0,0) and 3 (1,1) – Datasheet describes Mode 0 Operation • 50 MHz Clock Rate • Byte Mode and Page Mode Program (1 to 256 Bytes) Operations • Sector/Block/Page Architecture – 256 byte Pages per Sector – Eight 4 Kbyte Sectors per Block – Four uniform 32 Kbyte Blocks Self-timed Sector, Block and Chip Erase Product Identification Mode with JEDEC Standard Low-voltage Operation – 2.7V (VCC = 2.7V to 3.6V) Hardware and Software Write Protection – Device protection with Write Protect (WP) Pin – Write Enable and Write Disable Instructions – Software Write Protection: Upper 1/32, 1/16, 1/8, 1/4, 1/2 or Entire Array Flexible Op Codes for Maximum Compatibility Self-timed Program Cycle – 30 µs/Byte Typical Single Cycle Reprogramming (Erase and Program) for Status Register High Reliability – Endurance: 10,000 Write Cycles Typical 8-lead JEDEC 150mil SOIC and 8-lead Ultra Thin Small Array Package (SAP) • • • • High Speed Small Sectored SPI Flash Memory 1M (131,072 x 8) • • • • • AT25FS010 Description www.DataSheet4U.com The AT25FS010 provides 1,048,576 bits of serial reprogrammable Flash memory organized as 131,072 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT25FS010 is available in a space-saving 8-lead JEDEC SOIC and 8-lead Ultra Thin SAP packages. Table 1. Pin Configuration Pin Name CS SCK SI SO GND VCC WP HOLD Function Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Power Supply Write Protect Suspends Serial Input VCC _____ CS SO WP GND 1 2 3 4 8 7 6 5 VCC HOLD SCK SI Advance Information 8-lead JEDEC SOIC 8-lead SAP ___ 8 1 CS 2 ___ SO 3 WP 4 GND HOLD 7 SCK 6 SI 5 Bottom View 5167B–SFLSH–1/07 The AT25FS010 is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All write cycles are completely self-timed. BLOCK WRITE protection for upper 1/32, 1/16, 1/8, 1/4, 1/2 or the entire memory array is enabled by programming the status register. Separate write enable and write disable instructions are provided for additional data protection. Hardware data protection is provided via the WP pin to protect against inadvertent write attempts to the status register. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence. Absolute Maximum Ratings* Operating Temperature....................................–40°C to +85°C Storage Temperature .....................................–65°C to +150°C Voltage on Any Pin with Respect to Ground .................................... –1.0V to +5.0V Maximum Operating Voltage ............................................ 4.2V DC Output Current........................................................ 5.0 mA *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure 1. Block Diagram 524,288 x 8 2 AT25FS010 5167B–SFLSH–1/07 AT25FS010 Table 2. Pin Capacitance(1) Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +3.6V (unless otherwise noted) Symbol COUT CIN Note: Test Conditions Output Capacitance (SO) Input Capacitance (CS, SCK, SI, WP, HOLD) 1. This parameter is characterized and is not 100% tested. Max 8 6 Units pF pF Conditions VOUT = 0V VIN = 0V Table 3. DC Characteristics (Preliminary – Subject to Change) Applicable over recommended operating range from: TAI = –40°C to +85°C, VCC = +2.7V to +3.6V, TAC = 0°C to +70°C, VCC = +2.7V to +3.6V (unless otherwise noted) Symbol VCC ICC1 ICC2 ISB IIL IOL VIL(1) VIH(1) VOL VOH Note: Parameter Supply Voltage Supply Current Supply Current Standby Current Input Leakage Output Leakage Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage 2.7V ≤ VCC ≤ 3.6V IOL = 0.15 mA IOH = -100 µA VCC - 0.2 VCC = 3.6V at 20 MHz, SO = Open Read VCC = 3.6V at 20 MHz, SO = Open Write VCC = 2.7V, CS = VCC VIN = 0V to VCC VIN = 0V to VCC, TAC = 0°C to 70°C -3.0 -3.0 -0.6 VCC x 0.7 Test Condition Min 2.7 10.0 15.0 2.0 Typ Max 3.6 17.0 45.0 10.0 3.0 3.0 VCC x 0.3 VCC + 0.5 0.2 Units V mA mA µA µA µA V V V V 1. VIL and VIH max are reference only and are not tested. 3 5167B–SFLSH–1/07 Table 4. AC Characteristics (Preliminary – Subject to Change) Applicable over recommended operating range from TA = –40°C to +85°C, VCC = +2.7V to +3.6V CL = 1 TTL Gate and 30 pF (unless otherwise noted) Symbol fSCK tRI tFI tWH tWL tCS tCSS tCSH tSU tH tHD tCD tV tHO tLZ tHZ tDIS tse tbe tce tSR tBPC Endurance(2) Notes: Par.


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