ATA5761

Features Two Different IF Receiving Bandwidth Versions Are Available (BIF = 300 kHz or 600 kHz) Frequency Receiving Range of f0 = 868 MHz to 870 MHz or f0 = 902 MHz to 928 MHz 30 dB Image Rejection Receiving Bandwidth BIF = 600 kHz for Low Cost 90-ppm Crystals and BIF = 300 kHz for 55 ppm Crystals Fully Integrated LC-VCO and PLL Loop Filter Very High Sensitivity with Power Matched LNA High System IIP3 (–16 dBm), System 1-dB Compression Point (–25 dBm) High Large-signal Capability at GSM Band (Blocking –30 dBm at +20 MHz, IIP3 = –12 dBm at +20 MHz) 5V to 20V Automotive Compatible Data Interface Data Clock Available for Manchester- and Bi-phase-coded Signals Programmable Digital Noise Suppression Low Power Consumption Due to Configurable Polling Temperature Range –40°C to +105°C ESD Protection 2 kV HBM, All Pins Communication to Microcontroller Possible Via a Single Bi-directional Data Line Low-cost Solution Due to High Integration Level with Minimum External Circuitry Requirements UHF ASK/FSK Receiver ATA5760 ATA5761 1. Description www.DataSheet4U.com The ATA5760/ATA5761 is a multi-chip PLL receiver device supplied in an SO20 package. It has been especially developed for the demands of RF low-cost data transmission systems with data rates from 1 kBaud to 10 kBaud in Manchester or Bi-phase code. The receiver is well suited to operate with the Atmel’s PLL RF transmitter T5750. Its main applications are in the areas of telemetering, security tec...