Link Controller. TSS461F Datasheet

TSS461F Datasheet PDF, Equivalent


Part Number

TSS461F

Description

VAN Data Link Controller

Manufacture

ATMEL Corporation

Total Page 30 Pages
PDF Download
Download TSS461F Datasheet PDF


TSS461F Datasheet
Features
Fully Compliant to VAN Specification ISO/11519.3
Handles All Specified Module Types
Handles All Specified Message Types
Handles Retransmission of Frames on Contention and Errors
3 Separate Line Inputs with Automatic Diagnosis and Selection
1 Mbit/s Maximum Transfer Rate
Normal or Pulsed (Optical and Radio Mode) Coding
Intel®, NEC®, Texas Instruments® and Motorola® Compatible 8-bit Microprocessor
Interface
Multiplexed Address and Data Bus
Idle and Sleep Modes
128 Bytes of General-purpose RAM
DMA Capabilities for Message Handling
14 Identifier Registers with All Bits Individually Maskable
6-source Maskable Interrupt Including an Interrupt-on-reset to Detect Glitches on the
Reset Pin
Integrated Crystal or Resonator Oscillator with Internal Baud Rate Generator and
Buffered Clock Output
Single +5V Power Supply
0.5 mm CMOS Technology
SOP 24 Packaging
VAN Data Link
Controller
TSS461F
Description
Cost optimization in car manufacturing is of extreme importance today. Solutions to
this problem often implies the use of more advanced and intelligent electronic circuits.
The TSS461F is a circuit which allows the transfer of all the status information needed
in a carwww.DataSheet4U.com or truck over a single low-cost wire pair, thereby, minimizing the electrical wire
usage.
It can be used to interconnect powerful functions (ABS, dashboard, power train con-
trol) and to control and interface car body electronics (lights, wipers, power window,
etc.).
The TSS461F is fully compliant with the ISO standard 11519-3. This standard sup-
ports a wide range of applications such as low-cost remote control switches, typically
used for lamp control; complex, highly-autonomous, distributed systems like engine
controls, which require fast and secure data transfers.
The TSS461F is a microprocessor-interfaced line controller for mid-to-high complexity
bus-masters and listeners like injection/ignition control calculators, dashboard control-
lers and car stereo or mobile telephone CPUs.
The microprocessor interface consists of a 256-bytes of RAM and the register area is
divided into 11 control registers, 14 channel register sets and 128 bytes of general
purpose RAM, used as a message storage area, and a 6-source maskable interrupt.
The circuit operates in RAM using DMA techniques, controlled by the channel and
control registers. This allows virtually any microprocessor to interface with ease to the
TSS461F, and to use the free RAM as a scratch pad.
Messages are encoded in enhanced Manchester code, and an optional pulsed code
for use with an optical or radio link, at a maximum bit rate of 1 Mbit/s. The TSS461F
analyzes the messages received or transmitted according to 6 different criteria includ-
ing some higher level checks.
In addition, the bus interface has three separate inputs with automatic source diagno-
sis and selection, allowing for multibus listening or the automatic selection of the most
reliable source at any time if several line receivers are connected to the same bus.
7615A–AUTO–02/06

TSS461F Datasheet
Figure 1. Block Diagram
AD[7:0]
ALE
Address and Data Bus
Multiplexing logic
128 bytes
Message
buffer
RAM
INT RESET TEST VCC GND
control bus
data bus
address bus
Protocol controller
state machine and
ID registers
Data serializer and
deserializer
Status and
control
registers
status bus
Reception logic
Source diagnosis
and selection logic
CRC generator
and checker
Clock generator and
line synchronization
logic
Transmission logic
XTAL1 XTAL2 CKOUT
TxD
RxD0 RxD1 RxD2
2 TSS461F
7615A–AUTO–02/06


Features Datasheet pdf Features • • • • • • • • • • • • • • • • • Fully Compliant to VAN Specification ISO/11519.3 Handles All Specified Modul e Types Handles All Specified Message T ypes Handles Retransmission of Frames o n Contention and Errors 3 Separate Line Inputs with Automatic Diagnosis and Se lection 1 Mbit/s Maximum Transfer Rate Normal or Pulsed (Optical and Radio Mod e) Coding Intel®, NEC®, Texas Instrum ents® and Motorola® Compatible 8-bit Microprocessor Interface Multiplexed Ad dress and Data Bus Idle and Sleep Modes 128 Bytes of General-purpose RAM DMA C apabilities for Message Handling 14 Ide ntifier Registers with All Bits Individ ually Maskable 6-source Maskable Interr upt Including an Interrupt-on-reset to Detect Glitches on the Reset Pin Integr ated Crystal or Resonator Oscillator wi th Internal Baud Rate Generator and Buf fered Clock Output Single +5V Power Sup ply 0.5 mm CMOS Technology SOP 24 Packa ging VAN Data Link Controller TSS461F Description Cost optimization in car manufacturing is of extrem.
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