TS83C51U2

TS80C51U2 TS83C51U2 TS87C51U2 Double UART 8-bit CMOS Microcontroller 1. Description TS80C51U2 is high performance CMOS ROM, OTP and EPROM versions of the 80C51 CMOS single chip 8-bit microcontroller. The TS80C51U2 retains all features of the 80C51 with extended ROM/EPROM capacity (16 Kbytes), 256 bytes of internal RAM, a 7-source , 4-level interrupt system, an on-chip oscilator and three timer/counters. In addition, the TS80C51U2 has a second UART, enhanced functions on both UART, enhanced timer 2, a hardware watchdog timer, a dual data pointer, a baud rate generator and a X2 speed improvement mechanism. The fully static design of the TS80C51U2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data. The TS80C51U2 has 2 software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers, the serial port and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative. 2. Features q 80C52 Compatible 8051 pin and instruction compatible Four 8-bit I/O ports Three 16-bit timer/counters q q Asynchronous port reset Interrupt Structure with 7 Interrupt sources 4 level priority interrupt system www.DataSheet4U.com 256 bytes scratchpad RAM q q Full duplex Enhanced UARTs Framing error detection Automatic address recognition High-Speed Architecture 40 MHz @ 5V,...