K4S510432M DRAM LVTTL Datasheet

K4S510432M Datasheet, PDF, Equivalent


Part Number

K4S510432M

Description

512Mbit SDRAM 32M x 4bit x 4 Banks Synchronous DRAM LVTTL

Manufacture

Samsung semiconductor

Total Page 11 Pages
Datasheet
Download K4S510432M Datasheet


K4S510432M
K4S510432M
Preliminary
CMOS SDRAM
www.DataSheet4U.com
512Mbit SDRAM
32M x 4bit x 4 Banks
Synchronous DRAM
LVTTL
Revision 0.2
Dec. 2001
Samsung Electronics reserves the right to change products or specification without notice.
Rev. 0.2 Dec. 2001

K4S510432M
K4S510432M
Revision History
Revision 0.0 (Mar. 2001)
Revision 0.1 (Aug. 2001)
Defined target DC characteristics.
Revision 0.2 (Dec. 2001)
• Changed "Target" to "Preliminary".
• Redefined DC characteristics.
Preliminary
CMOS SDRAM
Rev. 0.2 Dec. 2001


Features K4S510432M Preliminary CMOS SDRAM 512M bit SDRAM 32M x 4bit x 4 Banks Synchron ous DRAM LVTTL www.DataSheet4U.com Re vision 0.2 Dec. 2001 Samsung Electroni cs reserves the right to change product s or specification without notice. Rev . 0.2 Dec. 2001 K4S510432M Revision Hi story Revision 0.0 (Mar. 2001) Revision 0.1 (Aug. 2001) Defined target DC char acteristics. Preliminary CMOS SDRAM R evision 0.2 (Dec. 2001) • • Changed "Target" to "Preliminary". Redefined D C characteristics. Rev. 0.2 Dec. 2001 K4S510432M 32M x 4Bit x 4 Banks Synchr onous DRAM FEATURES • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Four banks operation • MRS cycle with address k ey programs -. CAS latency (2 & 3) -. B urst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled at the positi ve going edge of the system clock. • Burst read single-bit write operation DQM for masking • Auto & self refresh • 64ms refresh period (8K cycle) Part No.
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