LS7566 QUADRATURE COUNTER Datasheet

LS7566 Datasheet, PDF, Equivalent


Part Number

LS7566

Description

24-BIT FOUR-AXES QUADRATURE COUNTER

Manufacture

LSI Computer Systems

Total Page 13 Pages
Datasheet
Download LS7566 Datasheet


LS7566
LSI/CSI
LS7566
U® L LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405
A3800
July 2005
24-BIT FOUR-AXES QUADRATURE COUNTER
FEATURES:
• Read/write registers for count and I/O modes.
Count modes include: Non-quadrature (Up/Down), Quadrature
(x1, x2, x4), Free-run, Non-recycle, Modulo-n and Range limit
• Separate mode-control registers for each axis
• Interrupt output and interrupt mask register.
• 40 MHz count frequency, 5V
20 MHz count frequency, 3V
• Sets of 24-bit counters, preset registers, comparators and
output latches and 8-bit status registers for each axis
• Digital filtering of the input quadrature clocks for
noise immunity.
• 3-state Octal I/O bus
• 3V to 5.5V operating voltage range
• LS7566-TS (TSSOP) -See Figure 1-
GENERAL DESCRIPTION:
Thewww.DataSheet4U.com LS7566 consists of four identical modules of 24-bit pro-
grammable counters with direct interface to incremental encod-
ers. The modules can be configured to operate as quadrature-
clock counters or non-quadrature up/down counters. In both
quadrature and non-quadrature modes, the modules can be fur-
ther configured into free-running, non-recycle, modulo-n and
range-limit count modes. The mode configuration is made
through two 8-bit read/write addressable control registers, MDR0
and MDR1. Data can be ported to a 24-bit preset register PR, or-
ganized in directly addressable (write-only) byte0 [PR0] byte1
[PR1] and byte2 [PR2] segments. PR can be transferred to the
24-bit counter CNTR either by instruction to MDR1 or by hard-
ware input control. A 24-bit digital comparator perpetually checks
for the equality of the CNTR and the PR and can be used to set
an output flag when the equality occurs. For reading the CNTR,
its instantaneous value can be transferred to a 24-bit output latch
OL, either by instruction to MDR1 or by hardware input control.
The OL in turn can be read in directly addressable (read-only)
byte0 [OL0], byte1 [OL1] and byte2 [OL2] segments. An address-
able (read-only) Octal status register STR, stores the count re-
lated status information such as CNTR overflow, underflow,
count direction etc. Data communication for read/write is per-
formed through an Octal 3-state parallel I/O bus.
REGISTER DESCRIPTION:
Following is a list of the hardware registers. There are four
sets of registers, with name prefixes x0 through x3 to refer
to axes x0 through x3.
7566-072205-1
PIN ASSIGNMENT - Top View
RS2 1
RS1 2
RS0 3
CHS1 4
CHS0 5
NC 6
NC 7
RD/ 8
CS/ 9
WR/ 10
DB0 11
DB1 12
DB2 13
DB3 14
DB4 15
DB5 16
DB6 17
DB7 18
NC 19
NC 20
PCK 21
GND 22
x0INDX 23
x0A 24
48 x0FLGa
47 x0FLGb
46 x1FLGa
45 INT/
44 NC
43 GND
42 x1FLGb
41 x2FLGa
40 x2FLGb
39 x3FLGa
38 x3FLGb
37 VDD
36 x3B
35 x3A
34 x3INDX
33 x2B
32 x2A
31 NC
30 NC
29 x2INDX
28 x1B
27 x1A
26 x1INDX
25 x0B
FIGURE 1
The information included herein is believed to be
accurate and reliable. However, LSI Computer Systems,
Inc. assumes no responsibilities for inaccuracies, nor for
any infringements of patent rights of others which may
result from its use.

LS7566
PR (x0PR, x1PR, x2PR, x3PR)
The PR is a 24-bit data register directly address-
able for write in individual segments of byte0 [PR0],
byte1 [PR1] and byte2 [PR2]. The PR serves as the in-
put portal for the counter (CNTR), since the CNTR is not
directly addressable for either read or write. In order to
preset the CNTR to any desired value the data is first
written into the PR and then transferred into the CNTR.
B23------------------------------------------------------------B0
PR: PR2
PR1
PR0
B7----------------B0 B7-------------B0 B7--------------B0
In mod-n and range-limit count modes the PR serves
as the repository for the division factor n and the count
range-limit, respectively. The PR can also be used to
hold the compare data for the CNTR wherein the equal-
ity PR = CNTR sets an output flag.
CNTR (x0CNTR, x1CNTR, x2CNTR, x3CNTR):
The CNTR is a 24-bit up/down counter which counts the
up/down pulses resulting from tthe quadrature clocks ap-
plied at A and B inputs or alternatively, in non-
quadrature mode, pulses applied at the A input. The
CNTR is not directly accessible for read or write; instead
it can be preloaded with data from the PR or it can port
its own data out to the OL which in turn can be accessed
by read operation. In both quadrature and non-
quadrature modes, the CNTR can be further configured
into either free-running or single-cycle or mod-n or
range-limit mode.
OL (x0OL, x1OL, x2OL, x3OL):
The OL is a 24-bit register directly addressable for read
in individual segments of byte0 [OL1], byte1 [OL1] and
byte2 [OL2]. OL serves as the output portal for the
CNTR. Snapshot of the CNTR data can be loaded in the
OL without interfering with the counting process, which
then can be accessed by read.
B23-----------------------------------------------------------B0
OL: OL2 OL1 OL0
STR (x0STR, x1STR, x2STR, x3STR):
The STR is an 8-bit status register indicating count related
status.
STR: CY BW CMP IDX CEN 0 U/D S
B7 B6 B5 B4 B3 B2 B1 B0
An individual STR bit is set to 1 when the bit related event
has taken place. The STR is cleared to 0 at power-up. The
STR can also be cleared through the control register CMR
with the exception of bit1 (U/D) and bit3 (CEN). These two
STR bits always indicate the instantaneous status of the
count_direction and count_enable assertion/de-assertion.
The STR bits are described below:
B7 (CY): Carry; set by CNTR overflow
B6 (BW): Borrow; set by CNTR underflow
B5 (CMP): Set when CNTR = PR
B4 (IDX): Set when INDX input is at active level
B3 (CEN): Set when counting is enabled, reset when
counting is disabled
B2 (0): Always 0
B1 (U/D): Set when counting up, reset when counting
down
B0 (S): Sign of count value; set when negative, reset
when positive
IMR:
The IMR is a trans-axis global register used for masking out
the interrupt function of individual axes. It is a 4-bit read/write
register with the following bit assignments.
IMR: B3 B2 B1 B0
B0 = 0: disable axis 0 interrupt
= 1: enable axis 0 interrupt
B1 = 0: disable axis 1 interrupt
= 1: enable axis 1 interrupt
B2 = 0: disable axis 2 interrupt
= 1: enable axis 2 interrupt
B3 = 0: disable axis 3 interrupt
= 1: enable axis 3 interrupt
B7----------------B0 B7-------------B0 B7--------------B0
A write to IMR places the lower nibble of the databus into the
IMR with identical bit map. A read of IMR produces a joint
read of IMR and ISR (interrupt status register), with IMR oc-
cupying the lower nibble and ISR occupying the upper nibble
of the databus.
7566-112904-2


Features UL ® LSI/CSI LSI Computer Systems, Inc . 1235 Walt Whitman Road, Melville, NY 11747 RS2 RS1 RS0 CHS1 CHS0 NC NC RD/ C S/ LS7566 (631) 271-0400 FAX (631) 271 -0405 July 2005 A3800 24-BIT FOUR-AXE S QUADRATURE COUNTER FEATURES: • Read /write registers for count and I/O mode s. Count modes include: Non-quadrature (Up/Down), Quadrature (x1, x2, x4), Fre e-run, Non-recycle, Modulo-n and Range limit • Separate mode-control registe rs for each axis • Interrupt output a nd interrupt mask register. • 40 MHz count frequency, 5V 20 MHz count freque ncy, 3V • Sets of 24-bit counters, pr eset registers, comparators and output latches and 8-bit status registers for each axis • Digital filtering of the input quadrature clocks for noise immun ity. • 3-state Octal I/O bus • 3V t o 5.5V operating voltage range • LS75 66-TS (TSSOP) -See Figure 1GENERAL DESC RIPTION: The LS7566 consists of four id entical modules of 24-bit programmable counters with direct interface to incremental encoders. The modules can be configu.
Keywords LS7566, datasheet, pdf, LSI Computer Systems, 24-BIT, FOUR-AXES, QUADRATURE, COUNTER, S7566, 7566, 566, LS756, LS75, LS7, Equivalent, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)