56857

56857 Data Sheet Technical Data www.DataSheet4U.com 56800E 16-bit Digital Signal Controllers DSP56857 Rev. 6 01/2007 freescale.com 56857 General Description 120 MIPS at 120MHz 40K x 16-bit Program SRAM 24K x 16-bit Data SRAM 1K x 16-bit Boot ROM Six (6) independent channels of DMA Two (2) Enhanced Synchronous Serial Interfaces (ESSI) Two (2) Serial Communication Interfaces (SCI) Serial Port Interface (SPI) Four (4) dedicated GPIO 8-bit Parallel Host Interface General Purpose 16-bit Quad Timer JTAG/Enhanced On-Chip Emulation (OnCE™) for unobtrusive, real-time debugging Computer Operating Properly (COP)/Watchdog Timer Time-of-Day (TOD) 100 LQFP package Up to 47 GPIO 6 VDDIO 12 VDD 8 VSSIO 12 VSS VDDA 5 VSSA 2 JTAG/ Enhanced OnCE Program Controller and Hardware Looping Unit Address Generation Unit 16-Bit DSP56800E Core Data ALU 16 x 16 + 36 Æ 36-Bit MAC Three 16-bit Input Registers Four 36-bit Accumulators Bit Manipulation Unit PAB PDB CDBR CDBW Memory Program Memory 40,960 x 16 SRAM Boot ROM 1024 x 16 ROM Data Memory 24,576 x 16 SRAM XDB2 XAB1 XAB2 PAB PDB CDBR CDBW System Bus Control DMA 6 channel Core CLK IPBus Bridge (IPBB) IPWDB Decoding Peripherals IPRDB IPAB DMA Requests IPBus CLK POR 3 CLKO MODEA-C or (GPIOH0-H2) System COP/TOD CLK Integration Module RSTO RESET EXTAL XTAL CS0-CS3[3:0] used as GPIOA0-A3 GPIO Contol 2 SCI ESSI0 or or GPIOE GPIOC ESSI1 or GPIOD Quad Timer or GPIOG 4 SPI Host Interrupt or Int...