MC3S12RG128

MC3S12RG128 Data Sheet www.DataSheet4U.com HCS12 Microcontrollers MC3S12RG128V1 Rev. 1.05 11/2006 freescale.com MC3S12RG128 Data Sheet covers MC3S12RB128, MC3S12R64 MC3S12RG128V1 Rev. 1.05 11/2006 To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com/ The following revision history table summarizes changes contained in this document. Revision History Date September, 2005 September, 2005 October, 2005 November, 2005 February, 2006 November, 2006 Revision Level 01.00 01.01 new book added MC3S12R64 corrected MC3S12RG128 block diagram updated SCIV2 chapter corrected MC3S12R64 memory map diagram, added warning about 8K RAM mapping updated MSCANV2 chapter added MC3S12RB128 updated ROM64KX16, SCI chapters updated electrical specification updated ATD10B8C, IIC chapters corrected duplicated offsets in device register map removed references to the INITEE register and marked it as “reserved” (there is no EEPROM on this device) Description 01.02 01.03 01.04 01.05 Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. This product incorporates SuperFlash® technology licensed from SST. © Freescale Semiconductor, Inc., 2005, 2006. All rights reserved. MC3S12RG128 Data Sheet, Rev. 1.05 4 Freescale Semiconductor Contents Section Number Title Chapter 1 Device O...