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EPF10K100B Dataheets PDF



Part Number EPF10K100B
Manufacturers Altera Corporation
Logo Altera Corporation
Description Embedded Programmable Logic Device
Datasheet EPF10K100B DatasheetEPF10K100B Datasheet (PDF)

EPF10K100B ® Embedded Programmable Logic Device Errata Sheet July 1998, ver. 1 Preliminary Information This errata sheet provides updated information for Revision A and Revision B EPF10K100B devices. The die revision is indicated by the third digit of the nine-digit code on the top side of the device. Revision C and higher EPF10K100B devices do not exhibit the conditions described in this document. Under certain voltage conditions, the output buffer delay for Revision A and Revision B EPF10K.

  EPF10K100B   EPF10K100B



Document
EPF10K100B ® Embedded Programmable Logic Device Errata Sheet July 1998, ver. 1 Preliminary Information This errata sheet provides updated information for Revision A and Revision B EPF10K100B devices. The die revision is indicated by the third digit of the nine-digit code on the top side of the device. Revision C and higher EPF10K100B devices do not exhibit the conditions described in this document. Under certain voltage conditions, the output buffer delay for Revision A and Revision B EPF10K100B devices is slower than the reported value for I/O pins with the Slow Slew Rate option turned on in the MAX+PLUS® II software. The MAX+PLUS II version 9.0 Timing Analyzer and Simulator report an added output delay of 4.5 ns when the Slow Slew Rate option is turned on. When the Slow Slew Rate option is turned on and the VCCINT and VCCIO pins are powered at 2.3 V and 3.6 V, respectively, the change in the measured output buffer delay due to the Slow Slew Rate option may be as high as 7.5 ns. www.DataSheet4U.com This condition in which the VCCINT and VCCIO pins are powered to the opposite extremes is rare. For designs where this increased delay is a problem, you should either turn off the Slow Slew Rate option or adjust the circuit’s power supply to provide a 2.5-V VCCINT. With the Slow Slew Rate option turned off, the device functions as reported in the MAX+PLUS II version 9.0 Timing Analyzer and Simulator. ® 101 Innovation Drive San Jose, CA 95134 (408) 544-7000 http://www.altera.com Applications Hotline: (800) 800-EPLD Customer Marketing: (408) 544-7104 Literature Services: (888) 3-ALTERA [email protected] Altera, EPF10K100B, MAX, MAX+PLUS, and MAX+PLUS II are trademarks and/or service marks of Altera Corporation in the United States and other countries. Altera acknowledges the trademarks of other organizations for their respective products or services mentioned in this document. Altera products are protected under numerous U.S. and foreign patents and pending applications, maskwork rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. Copyright © 1998 Altera Corporation. All rights reserved. Altera Corporation A-ES-10K100B-1.0 1 .


CDSW21-G EPF10K100B RF2123


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