Termination Regulator. BD3530F Datasheet

BD3530F Regulator. Datasheet pdf. Equivalent

Part BD3530F
Description DDR-SDRAM Termination Regulator
Feature www.DataSheet4U.com DDR-SDRAM T ermination Regulator BD3530F Åú Description BD3530F is a regulator.
Manufacture Rohm
Total Page 2 Pages
Datasheet
Download BD3530F Datasheet



BD3530F
www.DataSheet4U.com
DDR-SDRAM Termination Regulator
BD3530F
Description
BD3530F is a regulator developed as termination
power supply of standard DDR-SDRAM that is
used for PC.
Industry's highest speed of transient response
characteristic is realized. The built-in FET can sink
and source load current of 3A(max.)
Waveform quality when data is transferred at high
speed can't be deteriorated.
BD3530F meets the bus line standards SSTL-2 of
DDR-SDRAM.
High-reliability can be realized for any applications
using DDR-SDRAM.
Features
1) Built-in push-pull regulator for termination(VTT)
2) Built-in reference voltage circuit(VREF)
3) Built-in enable function
4) Built-in under voltage lock out circuit
5) Package SOP8
6) Built-in thermal shut down circuit
Dimension (Unit : mm)
5.0±0.2
85
14
1.27
0.4±0.1
0.15±0.1
0.1
SOP8
Applications
Note personal computer, Desktop personal computer
Absolute Maximum Ratings Ta=25˚C
Parameter
Symbol
Limits
Unit
Input voltage
VCC
71
V
Termination input voltage
VTT_IN
71
V
VDDQ reference voltage
VDDQ
71
V
Power dissipation 1
Pd1
560 2
mW
Power dissipation 2
Operating temperature range
Storage temperature range
Pd 2
Topr
Tstg
690 3
-10 +100
-55 +150
mW
˚C
˚C
1 Should not exceed Pd.
2 Reduced by 4.48mW for each increase in Ta of 1˚C over 25˚C(With no heat sink).
3 Reduced by 5.52mW for each increase in Ta of 1˚C over 25˚C(PCB(70mm 70mm 1.6mm)glass epoxy mounting.)



BD3530F
Recommended Operating Conditions Ta=25˚C
Parameter
Symbol Min. Typ.
Input voltage
VCC
4.5
-
Termination input voltage VTT_IN 1.7
*This product is designed for protection against radioactive rays.
-
Max.
5.5
2.6
Unit
V
V
Electrical characteristics (Unless otherwise noted, Ta=25˚C, VCC=5V, VEN=3V, VDDQ=2.5V, VTT_IN=2.5V
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Standby current
Bias current
<Termination>
IST - - 10 µA VEN=0V
ICC - 2 4 mA
Termination voltage
VTT VREF-30mV VREF VREF+30mV V Io=-3A to 3A, Ta=0 to 100
Source current
Sink current
Upper side ON resistance
Lower side ON resistance
<Reference voltage>
Output voltage
Source current
ITT+
ITT-
HRON
LRON
3
-
-
-
VREF
IREF+
1V/D2DQ-50mV
10
-
-
0.15
0.15
1V/D2DQ
20
-
-3
0.3
0.3
1V/D2DQ+50mV
-
A
A
V ITRaE=0F=-1to0m10A0to 10mA
mA
Sink current
IREF-
-
-20
-10
mA
<UVLO>
UVLO OFF voltage
VUVLO
4.2
4.35
4.5
V VCC : Sweep up
Hysteresis voltage
Design Guarantee
VUVLO
100
160
220
mV VCC : Sweep down
Application Circuit
Enable
EN
VCC
VDDQ
VTT_IN
VCC
Reference
Block
Thermal
Protection
VDDQ
VTT_IN
VCC 25k
-
+
UVLO
25k
VCC
VCC
TSD
EN
UVLO
Liner
N-MOS
Driver
VTT
UETSNVDLO
VTTS
TSD VREF
GND
BD3530F
VTT
1/2
VDDQ





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