Termination Regulators. BD3537F Datasheet

BD3537F Regulators. Datasheet pdf. Equivalent

Part BD3537F
Description Termination Regulators
Feature Datasheet Termination Regulator for DDR-SDRAMs BD3537F General Description BD3537F is a terminatio.
Manufacture Rohm
Datasheet
Download BD3537F Datasheet



BD3537F
Datasheet
Termination Regulator for DDR-SDRAMs
BD3537F
General Description
BD3537F is a termination regulator that complies with
JEDEC requirements for DDR-SDRAM, This linear
power supply uses a built-in N-channel MOSFET and
high-speed OP-AMPS specially designed to provide
excellent transient response. It has a sink/source
current capability up to 1.8A and has a power supply
bias requirement of 5.0V for driving the N-channel
MOSFET. For BD3537F, ceramic capacitor can be
used as output capacitor enabling significant package
profile downsizing as the total regulator part.
Features
Incorporates a Push-Pull Power Supply for
Termination (VTT)
Incorporates an Enabler
Incorporates an Undervoltage Lockout (UVLO)
Incorporates a Thermal Shutdown Protector (TSD)
Compatible with Dual Channel (DDR-II)
Incorporates Soft-start Function
Applications
Power supply for DDR I/II - SDRAM
Key Specifications
Termination Input Voltage Range:
1.746V to 1.854V
VCC Input Voltage Range:
4.75V to 5.25V
Output Current:
1.8A (Max)
High side FET ON-Resistance:
0.3Ω(Typ)
Low side FET ON-Resistance:
0.3Ω(Typ)
Standby Current:
50µA (Typ)
Operating Temperature Range: -30°C to +100°C
Package
W(Typ) x D(Typ) x H(Max)
SOP8
5.00mm x 6.20mm x 1.71mm
Typical Application Circuit, Block Diagram
C1
VCC
C4
VDDQ
R1
R2
REF
VTT_IN
C2
VTT_IN
Reference
Block
Thermal
Protection
VCC
-
+ UVLO
TSD
Enable
Block
EN
VCC
+
-
TSD
EN
UVLO
- VCC
+
TSD
EN
UVLO
VTT
C3
VTT
GND
Product structureSilicon monolithic integrated circuit
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ2211114001
This product has no designed protection against radioactive rays
1/15
TSZ02201-0J2J0A900970-1-2
02.Nov.2015 Rev.001



BD3537F
BD3537F
Pin Configuration
TOP VIEW
VTT_IN 1
GND 2
REF 3
VTT 4
8 N.C
7 N.C
6 VCC
5 N.C
Pin Descriptions
Pin Pin
No. Name
Pin Function
1 VTT_IN Termination power supply pin
2 GND Ground pin
3 REF Reference voltage output pin
4 VTT Termination output pin
5 N.C Non connection
6 VCC VCC pin
7 N.C Non connection
8 N.C Non connection
Description of Blocks
1. VCC
The VCC pin is for the independent power supply input that operates the external circuit of the IC. It is the voltage pin
that drives the IC’s amplifier circuits. The VCC input is 5V and the maximum current consumption is 2.5mA. A bypass
capacitor of 1μF or so should be connected to this pin when using the IC in an application circuit.
2. VTT_IN
VTT_IN is a power supply input pin for VTT output. Input voltage may range up to 1.8V, but consideration must be
given to the current limit dictated by the ON-Resistance of the IC and the change in allowable loss due to input/output
voltage difference.
Take note that a high-impedance voltage input at VTT_IN may result in oscillation or degradation in ripple rejection, so
connecting a 10μF capacitor with minimal change in capacitance to VTT_IN terminal is recommended. However, the
impedance may depend on the characteristics of the power supply input and the impedance of the PC board wiring,
which must be carefully checked before use.
3. VTT
VTT is the output pin for the DDR memory termination voltage and it has a sink/source current capability of ±1.8A. The
output voltage is same as REF voltage. The output is turned to OFF when REF pin is “LOW” or when either the VCC
UVLO or thermal shutdown protection function is activated.
Always connect a capacitor to VTT pin for a loop gain and phase compensation and a reduction in output voltage
variation in the event of sudden load change. Be careful in choosing the capacitor as insufficient capacitance may
cause an oscillation and high ESR (Equivalent Series Resistance) may result in increased output voltage variation
during a sudden change in load. A 10 μF or so ceramic capacitor is recommended, though ambient temperature and
other conditions should also be considered. A low ESR ceramic capacitor may reduce a loop gain phase margin and
may cause an oscillation, which may be improved by connecting a resister in series with the OS - capacitor (several -
hundred µF).
4. REF
A ”High” input of 0.6V or higher to REF turns ON the VTT output. A “Low” input of 0.15 V or less, on the other hand,
turns VTT to a Hi-Z state.
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
2/15
TSZ02201-0J2J0A900970-1-2
02.Nov.2015 Rev.001





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