Mobile FCRAM. MB84VD23481FJ-70 Datasheet

MB84VD23481FJ-70 FCRAM. Datasheet pdf. Equivalent

Part MB84VD23481FJ-70
Description 64 M (X16) FLASH MEMORY & 32 M (X16) Mobile FCRAM
Feature www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS05-50310-2E Stacked MCP (Multi-Chip Packag.
Manufacture Fujitsu Media Devices
Total Page 30 Pages
Datasheet
Download MB84VD23481FJ-70 Datasheet



MB84VD23481FJ-70
www.DataSheet4U.com
FUJITSU SEMICONDUCTOR
DATA SHEET
DS05-50310-2E
Stacked MCP (Multi-Chip Package) FLASH MEMORY & FCRAM
CMOS
64 M (×16) FLASH MEMORY &
32 M (×16) Mobile FCRAMTM
MB84VD23481FJ-70
s FEATURES
• Power Supply Voltage of 2.7 V to 3.1 V
High Performance
70 ns maximum access time (Flash)
70 ns maximum access time (FCRAM)
Operating Temperature
30 °C to +85 °C
Package 65-ball FBGA
s PRODUCT LINE-UP
Power Supply Voltage ( V )
Max Address Access Time (ns)
Flash Memory
VCCf* = 2.7 V to 3.1 V
70
Max CE Access Time (ns)
70
Max OE Access Time (ns)
30
*: Both VCCf and VCCr must be the same level when either part is being accessed.
s PACKAGE
65-ball plastic FBGA
(Continued)
FCRAM
VCCr* = 2.7 V to 3.1 V
65
65
40
(BGA-65P-M01)



MB84VD23481FJ-70
MB84VD23481FJ-70
(Continued)
FLASH MEMORY
• 0.17 µm Process Technology
Simultaneous Read/Write Operations (Dual Bank)
FlexBankTM *1
Bank A : 8 Mbit (8 KB × 8 and 64 KB × 15)
Bank B : 24 Mbit (64 KB × 48)
Bank C : 24 Mbit (64 KB × 48)
Bank D : 8 Mbit (8 KB × 8 and 64 KB × 15)
Two virtual Banks are chosen from the combination of four physical banks. Host system can program or erase
in one bank, and then read immediately and simultaneously from the other bank with zero latency between
read and write operations.
Read-while-erase
Read-while-program
Single 3.0 V Read, Program, and Erase
Minimized system level power requirements
Minimum 100,000 Program/Erase Cycles
Sector Erase Architecture
Sixteen 4 Kword and one hundred twenty-six 32 Kword sectors in word.
Any combination of sectors can be concurrently erased. It also supports full chip erase.
HiddenROM Region
256 byte of HiddenROM, accessible through a new “HiddenROM Enable” command sequence
Factory serialized and protected to provide a secure electronic serial number (ESN)
WP/ACC Input Pin
At VIL, allows protection of “outermost” 2 × 8 Kbytes on both ends of boot sectors, regardless of sector protection/
unprotection status
At VIH, allows removal of boot sector protection
At VACC, increases program performance
Embedded EraseTM *2 Algorithms
Automatically preprograms and erases the chip or any sector
Embedded ProgramTM *2 Algorithms
Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit Feature for Detection of Program or Erase Cycle Completion
Ready/Busy Output (RY/BY)
Hardware method for detection of program or erase cycle completion
Automatic Sleep Mode
When addresses remain stable, the device automatically switches itself to low power mode.
Low VCCf Write Inhibit 2.5 V
Program Suspend/Resume
Suspends the program operation to allow a read in another byte
Erase Suspend/Resume
Suspends the erase operation to allow a read data and/or program in another sector within the same device
• Please Refer to “MBM29DL64DF” Datasheet in Detailed Function
(Continued)
2





@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)