512K X 16 BIT LOW VOLTAGE CMOS SRAM
LP62E16512-I Series
Preliminary
Document Title 512K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History
Rev. No.
0.0
512K X...
Description
LP62E16512-I Series
Preliminary
Document Title 512K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History
Rev. No.
0.0
512K X 16 BIT LOW VOLTAGE CMOS SRAM
History
Initial issue
Issue Date
April 26, 2002
Remark
Preliminary
PRELIMINARY
(April, 2002, Version 0.0)
AMIC Technology, Inc.
LP62E16512-I Series
Preliminary
Features
n Operating voltage: 1.65V to 2.2V n Access times: 70 ns (max.) n Current: Very low power version: Operating: 40mA (max.) Standby: 10µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 1.2V (min.) n Available in 48-ball CSP (8×10mm) packages
512K X 16 BIT LOW VOLTAGE CMOS SRAM
General Description
The LP62E16512-I is a low operating current 8,388,608bit static random access memory organized as 524,288 words by 16 bits and operates on low power voltage from 1.65V to 2.2V. It is built using AMIC's high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enable input is provided for POWER-DOWN, device enable. Two byte enable inputs and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 1.2V.
Product Family Product Family
LP62E16512 Operating Temperature VCC Range
Power Dissipation Speed
Data Retention (ICCDR, Typ.) 0.1µA Standby (ISB1, Typ.) 0.5µA Operating ...
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