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TMOS Driver. 33285 Datasheet

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TMOS Driver. 33285 Datasheet
















33285 Driver. Datasheet pdf. Equivalent













Part

33285

Description

Dual High-Side TMOS Driver



Feature


www.DataSheet4U.com Freescale Semiconduc tor Advance Information Document Numb er: MC33285 Rev. 5.0, 2/2007 Dual High -Side TMOS Driver A single input contro ls the 33285 in driving two external hi gh-side NChannel TMOS power FETs contro lling incandescent or inductive loads. Pulse Width Modulated (PWM) input contr ol to 1.0 kHz is possible. The 33285 co ntains a common in.
Manufacture

Freescale Semiconductor

Datasheet
Download 33285 Datasheet


Freescale Semiconductor 33285

33285; ternal charge pump used to enhance the G ate voltage of both FETs. An external c harge capacitor provides access to the charge pump output. Both external FETs are protected against inductive load tr ansients by separate internal source-to -gate dynamic clamps. The power FETs ar e protected by the 33285 with short-cir cuit delay time of 800 µs. The device is designed to with.


Freescale Semiconductor 33285

stand reverse polarity battery and load dump transients, encountered in automot ive applications. Features • PWM Capa bility • Power TMOS Number One (OUT1) Short-Circuit Detection and Short-Circ uit Protection • Voltage Range 7.0 V ≤ 40 V • Extended Temperature Range from -40°C ≤ 125°C • Load Dump P rotected • Overvoltage Detection and Activation of OUT2 During Overvoltag.


Freescale Semiconductor 33285

e • Single Input Control for Both Outp ut Stages • Capacitor Value of 100 nF Connected to Pin CP • Analog Input C ontrol Measurement Detection • OUT1 L OAD Leakage Measurement Detection • P b-Free Packaging Designated by Suffix C ode EF 33285 HIGH-SIDE TMOS DRIVER D SUFFIX EF SUFFIX (PB-FREE) 98ASB42564B 8-PIN SOICN ORDERING INFORMATION Devic e MC33285D/R2 MCZ33285EF/R2 .





Part

33285

Description

Dual High-Side TMOS Driver



Feature


www.DataSheet4U.com Freescale Semiconduc tor Advance Information Document Numb er: MC33285 Rev. 5.0, 2/2007 Dual High -Side TMOS Driver A single input contro ls the 33285 in driving two external hi gh-side NChannel TMOS power FETs contro lling incandescent or inductive loads. Pulse Width Modulated (PWM) input contr ol to 1.0 kHz is possible. The 33285 co ntains a common in.
Manufacture

Freescale Semiconductor

Datasheet
Download 33285 Datasheet




 33285
www.DFaretaeSshceeatl4eUS.ceommiconductor
Advance Information
Document Number: MC33285
Rev. 5.0, 2/2007
Dual High-Side TMOS Driver
A single input controls the 33285 in driving two external high-side N-
Channel TMOS power FETs controlling incandescent or inductive
loads. Pulse Width Modulated (PWM) input control to 1.0 kHz is
possible. The 33285 contains a common internal charge pump used to
enhance the Gate voltage of both FETs.
An external charge capacitor provides access to the charge pump
output. Both external FETs are protected against inductive load
transients by separate internal source-to-gate dynamic clamps. The
power FETs are protected by the 33285 with short-circuit delay time of
800 µs. The device is designed to withstand reverse polarity battery
and load dump transients, encountered in automotive applications.
33285
HIGH-SIDE TMOS DRIVER
Features
• PWM Capability
• Power TMOS Number One (OUT1) Short-Circuit Detection and
Short-Circuit Protection
• Voltage Range 7.0 V 40 V
• Extended Temperature Range from -40°C 125°C
• Load Dump Protected
• Overvoltage Detection and Activation of OUT2 During
Overvoltage
• Single Input Control for Both Output Stages
• Capacitor Value of 100 nF Connected to Pin CP
• Analog Input Control Measurement Detection
• OUT1 LOAD Leakage Measurement Detection
• Pb-Free Packaging Designated by Suffix Code EF
D SUFFIX
EF SUFFIX (PB-FREE)
98ASB42564B
8-PIN SOICN
ORDERING INFORMATION
Device
MC33285D/R2
MCZ33285EF/R2
Temperature
Range (TA)
-40°C to 125°C
Package
8 SOICN
VCC
Input Control
33285
VCC DRN
CP
OUT2
IN OUT1
GND SRC
VPWR
Motor
Figure 1. 33285 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.




 33285
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VIGN
VCC
CCP
CP
Kl.30
VREF
+
R
S
- tLDDET
Load Dump
Detection
Oscillator
and
Divider
IN
THRIN2
tOUT2ECT R Q
OUT2 Activation
+ Time
S
-
Charge
Pump
ION2
IOUTN2
GND
THRIN1
+
- RQ
S
OC Detection
tOCDET
Start tOCDET
Bandgap
Rthr
ION1
VOUT2-VDRN> VTH2
VOUT1-VSRC> VTH1
IOUTN1 +
-
SCPC
DRN
OUT2
OUT1
SRC
M
Figure 2. 33285 Simplified Internal Block and Typical Applications Diagram
33285
2
Analog Integrated Circuit Device Data
Freescale Semiconductor




 33285
PIN CONNECTIONS
PIN CONNECTIONS
Table 1. 33285 Pin Definitions
SRC
11
88 IN
OUT1
22
77 GND
DRN
33
66 VCC
OUT2
44
5 5 CP
Figure 3. 33285 Pin Connections
Pin Number
1
2
3
4
5
6
7
8
Pin Name
SRC
OUT1
DRN
OUT2
CP
VCC
GND
IN
Formal Name
Definition
Source
Output 1
Drain
Output 2
Charge Pump
Voltage Power Supply
Ground
Input
OUT2 external FET Source connection
This pin is output number 1
OUT1 and OUT2 external FET Drain connection
This pin is output number 2
External capacitor connection for internal the Charge Pump
Battery supply voltage
This is the ground pin.
Voltage level sensitive input for OUT1 and OUT2
Analog Integrated Circuit Device Data
Freescale Semiconductor
33285
3




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