Replacement Unit. TK68HC24 Datasheet

TK68HC24 Unit. Datasheet pdf. Equivalent

Part TK68HC24
Description Port Replacement Unit
Feature www.DataSheet4U.com Tekmos – Preliminary Port Replacement Unit (PRU) For 6811 – type microprocessor.
Manufacture ETC
Datasheet
Download TK68HC24 Datasheet




TK68HC24
www.DataSheet4U.com
Tekmos Preliminary
TK68HC24 PRU
Port Replacement Unit (PRU)
For 6811 – type microprocessors
Features
Exact replacement for the Motorola MC68HC24 PRU
Utilizes the Tekmos 6824 Core
Replaces ports B and C of 6811 type microprocessors.
The chip-select function allows multiple TK68HC24s to be used in systems requiring multiple parallel ports.
3 – 5.5 Volt Operation.
0 – 5 MHz Operation.
Supports all handshake and I/O modes.
Available in 40 PDIP (P) and 44 PLCC (FN) versions.
Description
The TK68HC24 is an exact replacement of the Motorola 68HC24.
The TK68HC24 is designed to replace the Port B and Port C functions of 6811 – type microprocessors. These
functions are lost when the 6811 type microprocessors are operated in the expanded mode. The TK68HC24
has an address re-mapping feature that allows multiple TK68HC24s to be used within a single system.
Pinout
STRA
PC0
PC1
PC2
PC3
NC
PC4
PC5
PC6
PC7
VDD
6 5 4 3 2 1 44 43 42 41 40
7
8
9
10
11 TK68HC24FN
12
13
44 PLCC
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
18 19 20 21 22 23 24 25 26 27 28
RESETN
AD0
AD1
AD2
AD3
NC
AD4
AD5
AD6
AD7
VSS
NC
A15
A14
A13
A12
STRA
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
VDD
STRB
PB7
PB6
PB5
PB4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 CSN
39 MODE
38 AS
37 E
36 R/WN
35 RESETN
34 AD0
33 AD1
32 AD2
31 AD3
30 AD4
29 AD5
28 AD6
27 AD7
26 VSS
25 IRQN
24 PB0
23 PB1
22 PB2
21 PB3
www.Tekmos.com
8/21/99



TK68HC24
www.DataSheet4U.com
Tekmos
TK68HC24 PRU
Pinout
PDIP
40
1
2-5
6
7-14
15
16
17-24
25
26
27-34
35
36
37
38
39
40
PLCC
44
2
3-6
7
8-11,
13-16
17
18
19-22,
24-27
28
29
30-33,
35-38
39
40
41
42
43
44
Name
IOTEST
A15 – A12
STRA
PC0 – PC7
VDD
STRB
PB7 – PB0
IRQN
VSS
AD7 - AD0
RESETN
RWN
E
AS
MODE
CSN
Type Function
N/C
Input
Input
Bidirec
tional
Supply
Output
Output
Not used in the Tekmos design
Address lines for port mapping.
Handshake input
General purpose input / output port
Positive supply
Handshake output
General purpose output port
Output
Supply
Bidirec
tional
Input
Input
Input
Input
Input
Input
Interrupt Request, open drain, active low
Ground
Multiplexed address / data bus from the 68HC11
Reset, active low
Read / Write control signal
Enable – clock
Address strobe
Selects operating mode at reset.
Chip select
Pin Descriptions
IOTEST
No Connect
The IOTEST pin was removed from the 68HC24
design several years ago. However, it continued to
be referenced on the data sheet. This pin is a true
no connect, and may be either tied to a convenient
supply, used for routing other signals, or it may be
left floating.
A15 – A12
High Order Address - Inputs
These are the high order address lines from the
processor. They are latched by the rising edge of
the E clock. The value on the address lines is
compared against the contents of the INIT register.
A match, combined with an active chip select
selects the part during the current bus cycle.
AD7 – AD0
Address and Data Bus - Bidirectional
These pins are a multiplexed address / data bus.
During the first portion of the bus cycle, when the E
clock is low, the AD bus contains the address. The
address is strobed into an internal address latch by
the ALE pin. During the second portion of the bus
cycle, when the E clock is high, the AD pins carry
data. Depending on the state of the RWN pin, the
part will either read the bus, or drive the bus.
STRA
Strobe A – Input
This pin is used as an input handshake signal by
Port C. In the simple strobed and input handshake
modes, STRA is used to latch data into the
PORTCL register. In the output handshake mode,
STRA is used to acknowledge the output data. The
EGA bit in the PIOC register controls which edge of
STRA is active.
STRB
Strobe B - Output
The STRB pin serves as an output strobe for Port B
when the part is operating in the simple strobed I/O
mode. In the handshake mode, STRB is a
handshake output line. In the input handshake
mode, the pin serves as a READY line, inhibiting
the external device from strobing data into Port C.
In the output handshake mode, STRB indicates that
new data has been written to Port B by the
2
www.Tekmos.com
8/21/99







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)