MSM54V32128

E2L0046-17-Y1 www.DataSheet4U.com ¡ Semiconductor ¡ Semiconductor MSM54V32126/8 DESCRIPTION This version: Jan. 1998 MSM54V32126/8 Previous version: Dec. 1996 Pr el im in ar y 131,072-Word ¥ 32-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO The MSM54V32126/8 is a new generation Graphics DRAM organized in a 131,072-word ¥ 32-bit configuration. The technology used to fabricate the MSM54V32126/8 is OKI's CMOS silicon gate process technology. The device operates with a single 3.3 V power supply. FEATURES 131,072-word ¥ 32-bit organization Single 3.3 V power supply, ± 0.3 V tolerance Refresh: 512 cycles/8 ms Fast Page Mode with Extended Data Out (EDO) Write per bit (MSM54V32128 only) Byte write, Byte read RAS only refresh CAS before RAS refresh CAS before RAS self-refresh Hidden refresh Package: 64-pin 525 mil plastic SSOP (SSOP64-P-525-0.80-K) (Product : MSM54V32126-xxGS-K) (Product : MSM54V32128-xxGS-K) xx indicates speed rank. PRODUCT FAMILY Family MSM54V32126/8-50 MSM54V32126/8-60 Access Time (Max.) tRAC tAA tCAC tOEA 50 ns 25 ns 15 ns 15 ns 60 ns 30 ns 18 ns 18 ns Cycle Time (Min.) 110 ns 130 ns Power Dissipation Operating (Max.) Standby (Max.) 504 mW 486 mW 3.1 mW 1/25 www.DataSheet4U.com ¡ Semiconductor MSM54V32126/8 PIN CONFIGURATION (TOP VIEW) VCC DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS DQ8 DQ9 DQ10 DQ11 VCC DQ12 DQ13 DQ14 DQ15 VSS NC NC NC WB* / WE RAS NC A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48...