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XR19L402 Dataheets PDF



Part Number XR19L402
Manufacturers Exar Corporation
Logo Exar Corporation
Description TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER
Datasheet XR19L402 DatasheetXR19L402 Datasheet (PDF)

www.DataSheet4U.com JUNE 2007 XR19L402 TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER REV. 1.0.0 GENERAL DESCRIPTION The XR19L402 (L402) is a highly integrated device that combines a full-featured two channel Universal Asynchronous Receiver and Transmitter (UART) and RS485 transceivers. The L402 is designed to operate with a single 3.3V or 5V power supply. The L402 is fully compliant with RS-485 Standards. The L402 operates in four different modes: Active, Partial Sleep, Full Sleep and Pow.

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www.DataSheet4U.com JUNE 2007 XR19L402 TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER REV. 1.0.0 GENERAL DESCRIPTION The XR19L402 (L402) is a highly integrated device that combines a full-featured two channel Universal Asynchronous Receiver and Transmitter (UART) and RS485 transceivers. The L402 is designed to operate with a single 3.3V or 5V power supply. The L402 is fully compliant with RS-485 Standards. The L402 operates in four different modes: Active, Partial Sleep, Full Sleep and Power-Save. Each mode can be invoked via hardware or software. Upon power-up, the L402 is in the Active mode where the UART and RS-485 transceiver function normally. In the Partial Sleep mode, the internal crystal oscillator of the UART or charge pump of the RS-485 transceiver is turned off. In Full Sleep mode, both the crystal oscillator and the charge pump are turned off. While the UART is in the Sleep mode, the Power-Save mode isolates the core logic from the control signals (chip select, read/write strobes, address and data bus lines) to minimize the power consumption. The RS-485 receivers remain active in any of these four modes. APPLICATIONS • Battery-Powered Equipment • Handheld and Mobile Devices • Handheld Terminals • Industrial Peripheral Interfaces • Point-of-Sale (POS) Systems FEATURES • Meets true RS-485 Standards at 3.3V or 5V operation • Up to 8 Mbps data transmission rate • 45us sleep mode exit (charge pump to full power) • ESD protection for RS-485 I/O pins at ■ ■ ■ +/-15kV - Human Body Model +/- 8kV - IEC 1000-4-2, Contact Discharge +/- 15kV - IEC 61000-4-2, Air-Gap Discharge • Software compatible with industry standard 16550 UART • Intel/Motorola bus select • Complete modem interface • Sleep and Power-save modes to conserve battery power • Wake-up interrupt upon exiting low power modes FIGURE 1. BLOCK DIAGRAM VCC33 XTAL1 XTAL2 VCC50 R_EN GND ACP C1+ Intel or Motorola Bus Interface PwrSave A2:A0 D7:D0 IOR# IOW# (R/W#) CSA# (CS#) CSB# INTA (IRQ#) INTB RESET (RESET#) I/M# TEST_EN HALF/FULLA# HALF/FULLB# *5 V Tolerant Inputs Crystal Osc/Buffer BRG Charge Pump TXA+ TXARXA+ RXA- 64 Byte TX FIFO UART Registers 64 Byte RX FIFO TXA RXA VCC33 Modem I/Os CTSA# DSRA# RIA# CDA# TXB RXB RS-485 Transceiver Channel A Channel B ( Similar to ChannelA ) UART C1- TXB+ TXBRXB+ RXBTXB RXB RXBSEL XR19L402 Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com XR19L402 TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER FIGURE 2. PIN OUT OF THE DEVICE REV. 1.0.0 41 HALF/FULLA# 40 HALF/FULLB# 42 TEST_EN 44 RXBSEL 39 VDD50 46 INTA 45 INTB TXA+ 38 37 GND 48 43 RXB A1 47 A2 A0 D0 1 2 36 35 34 33 32 31 30 29 28 27 26 25 ACP 20 R_EN 21 VDD33 22 TXB+ 23 IOR# 16 RESET 19 XTAL2 14 XTAL1 13 IOW# 15 GND 24 TXB 17 I/M# 18 TXANC RXA+ RXANC C1+ C1NC RXBRXB+ NC TXB- D1 3 D2 4 D3 5 D4 D5 6 7 D6 8 D7 9 CSA# 10 CSB # 11 PW RSAVE 12 XR19L 402 48 - pin QFN Intel Bus Mode VCC 40 HALF/FULLB# 41 HALF/FULLA# 42 TEST_EN 44 RXBSEL 39 VCC50 38 TXA+ 46 IRQ# 37 GND 48 43 RXB 45 NC A1 47 A2 A0 D0 1 2 36 35 34 33 32 31 30 29 28 27 26 25 ACP 20 R_EN 21 VCC33 22 TXB+ 23 RESET# 19 XTAL2 14 XTAL1 13 R/W# 15 GND 24 NC 16 TXB 17 I/M# 18 TXANC RXA+ RXANC C1+ C1NC RXBRXB+ NC TXB- D1 3 D2 4 D3 5 D4 D5 6 7 D6 8 D7 9 CS# 10 A3 11 PW RSAVE 12 XR19L 402 48 - pin QFN Motorola Bus Mode GND ORDERING INFORMATION PART NUMBER XR19L402IL48 PACKAGE 48-pin QFN OPERATING TEMPERATURE RANGE -40°C to +85°C DEVICE STATUS Active 2 XR19L402 REV. 1.0.0 TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER PIN DESCRIPTIONS Pin Descriptions NAME 48-QFN PIN# TYPE DESCRIPTION DATA BUS INTERFACE (CMOS/TTL Voltage Levels) A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 IOR# (NC) 47 48 1 9 8 7 6 5 4 3 2 16 I Address bus lines [2:0]. These 3 address lines select one of the internal registers in the UART during a data bus transaction. Data bus lines [7:0] (bidirectional). I/O I When I/M# pin is HIGH, the Intel bus interface is selected and this input becomes read strobe (active LOW). The falling edge instigates an internal read cycle and retrieves the data byte from an internal register pointed by the address lines [A2:A0], puts the data byte on the data bus to allow the host processor to read it on the rising edge. When I/M# pin is LOW, the Motorola bus interface is selected and this input is not used. When I/M# pin is HIGH, it selects Intel bus interface and this input becomes write strobe (active LOW). The falling edge instigates the internal write cycle and the rising edge transfers the data byte on the data bus to an internal register pointed by the address lines. When I/M# pin is LOW, the Motorola bus interface is selected and this input becomes read (HIGH) and write (LOW) signal. When I/M# pin is HIGH, this input is chip select A (active low) to enable channel A in the device. When I/M# pin is LOW, this input becomes the chip select (active low) for the Motorola bus interf.


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