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XRT73L06
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.2
OCTOBER 2003
GENERAL DESCRIPTION
The XRT73L06 is a six channel fully integrated Line Interface Unit (LIU) for E3/DS3/STS-1 applications. The LIU incorporates 6 independent Receivers and Transmitters in a single 217 Lead BGA package. Each channel of the XRT73L06 can be independently configured to operate in E3 (34.368 MHz), DS3 (44.736 MHz) or STS-1 (51.84 MHz). Each transmitter can be turned off and tri-stated for redundancy support or for conserving power. The XRT73L06’s differential receiver provides high noise interference margin and is able to receive data over 1000 feet of cable or with up to 12 dB of cable attenuation. The XRT73L06 provides a Parallel Microprocessor Interface for programming and control. FIGURE 1. BLOCK DIAGRAM OF THE XRT 73L06
The XRT73L06 supports analog, remote and digital loop-backs. The device also has a built-in Pseudo Random Binary Sequence (PRBS) generator and detector with the ability to insert and detect single bit error for diagnostic purposes.
APPLICATIONS • E3/DS3 Access Equipment • DSLAMs • Digital Cross Connect Systems • CSU/DSU Equipment • Routers • Fiber Optic Terminals
CS RD WR Addr[7:0] D[7:0] PCLK RDY INT Pmode RESET
XRT73L06 XRT73L06
µProcessor Interface
CLKOUT_n SFM_en RLOL_n E3Clk DS3Clk STS-Clk/12M
MUX
Peak Detector Slicer Clock & Data Recovery LOS Detector
Clock Synthesizer HDB3/ B3ZS Decoder
RxClk_n RxPOS_n RxNEG/LCV_n
RTIP_n RRing_n
AGC/ Equalizer
Local LoopBack
Remote LoopBack RLOS_n TxClk_n TxPOS_n TxNEG_n
TTIP_n TRing_n MTIP_n MRing_n DMO_n ICT
Line Driver
Tx Pulse Shaping
Timing Control
MUX
HDB3/ B3ZS Encoder
Device Monitor
Tx Control
TxON Channel 0 Channel n... Channel 5
ORDERING INFORMATION
PART NUMBER XRT73L06IB PACKAGE 217 Lead BGA OPERATING TEMPERATURE RANGE -40°C to +85°C
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com
XRT73L06
REV. 1.0.2
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
FEATURES
RECEIVER
• Accepts either Single-Rail or Dual-Rail data from
Terminal Equipment and generates a bipolar signal to the line
• On chip Clock and Data Recovery circuit for high
input jitter tolerance
• Meets E3/DS3/STS-1 Jitter Tolerance Requirement • Detects and Clears LOS as per G.775 • Receiver Monitor mode handles up to 20 dB flat
loss with 6 dB cable attenuation
• Integrated Pulse Shaping Circuit • Built-in B3ZS/HDB3 Encoder (which can be
disabled)
• Accepts Transmit Clock with duty cycle of 30%70%
• On chip B3ZS/HDB3 encoder and decoder that can
be either enabled or disabled
• Generates pulses that comply with the ITU-T G.703
pulse template for E3 applications
• On-chip clock synthesizer provides the appropriate
rate clock from a single 12.288 MHz Clock
• Generates pulses that comply with the DSX-3 pulse
template, as specified in Bellcore GR-499-CORE and ANSI T1.102_1993
• Provides low jitter output clock
TRANSMITTER
•.