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XRT73R12 Dataheets PDF



Part Number XRT73R12
Manufacturers Exar Corporation
Logo Exar Corporation
Description TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
Datasheet XRT73R12 DatasheetXRT73R12 Datasheet (PDF)

www.DataSheet4U.com PRELIMINARY XRT73R12 REV. P1.0.3 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT OCTOBER 2003 GENERAL DESCRIPTION The XRT73R12 is a twelve channel fully integrated Line Interface Unit (LIU) featuring EXAR’s R3 Technology (Reconfigurable, Relayless Redundancy) for E3/DS3/STS-1 applications. The LIU incorporates 12 independent Receivers and Transmitters in a single 420 Lead TBGA package. Each channel of the XRT73R12 can be independently configured to operate in E3 (34.368 M.

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www.DataSheet4U.com PRELIMINARY XRT73R12 REV. P1.0.3 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT OCTOBER 2003 GENERAL DESCRIPTION The XRT73R12 is a twelve channel fully integrated Line Interface Unit (LIU) featuring EXAR’s R3 Technology (Reconfigurable, Relayless Redundancy) for E3/DS3/STS-1 applications. The LIU incorporates 12 independent Receivers and Transmitters in a single 420 Lead TBGA package. Each channel of the XRT73R12 can be independently configured to operate in E3 (34.368 MHz), DS3 (44.736 MHz) or STS-1 (51.84 MHz). Each transmitter can be turned off and tri-stated for redundancy support or for conserving power. The XRT73R12’s differential receiver provides high noise interference margin and is able to receive data over 1000 feet of cable or with up to 12 dB of cable attenuation. The XRT73R12 provides a Parallel Microprocessor Interface for programming and control. The XRT73R12 supports analog, remote and digital loop-backs. The device also has a built-in Pseudo Random Binary Sequence (PRBS) generator and detector with the ability to insert and detect single bit error for diagnostic purposes. APPLICATIONS • E3/DS3 Access Equipment • DSLAMs • Digital Cross Connect Systems • CSU/DSU Equipment • Routers • Fiber Optic Terminals FIGURE 1. BLOCK DIAGRAM OF THE XRT 73R12 CS RD WR Addr[7:0] D[7:0] PCLK RDY INT Pmode RESET XRT73R12 CLKOUT_n µProcessor Interface SFM_en RLOL_n E3Clk DS3Clk STS-Clk/12M MUX Peak Detector Slicer Clock & Data Recovery LOS Detector Clock Synthesizer HDB3/ B3ZS Decoder RTIP_n RRing_n AGC/ Equalizer RxClk_n RxPOS_n RxNEG/LCV_n Local LoopBack Remote LoopBack RLOS_n TxClk_n TxPOS_n TxNEG_n TTIP_n TRing_n MTIP_n MRing_n DMO_n ICT Line Driver Tx Pulse Shaping Timing Control MUX HDB3/ B3ZS Encoder Device Monitor Tx Control TxON Channel 0 Channel n... Channel 11 ORDERING INFORMATION PART NUMBER XRT73R12IB PACKAGE 420 Lead TBGA OPERATING TEMPERATURE RANGE -40°C to +85°C Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com XRT73R12 REV. P1.0.3 PRELIMINARY TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT FEATURES RECEIVER • - 40°C to 85°C Industrial Temperature Range TRANSMIT INTERFACE CHARACTERISTICS (Reconfigurable, Relayless • R3 Technology Redundancy) input jitter tolerance • Accepts either Single-Rail or Dual-Rail data from Terminal Equipment and generates a bipolar signal to the line • On chip Clock and Data Recovery circuit for high • Meets E3/DS3/STS-1 Jitter Tolerance Requirement • Detects and Clears LOS as per G.775 • Receiver Monitor mode handles up to 20 dB flat loss with 6 dB cable attenuation • Integrated Pulse Shaping Circuit • Built-in B3ZS/HDB3 Encoder (which can be disabled) • Accepts Transmit Clock with duty cycle of 30%70% • On chip B3ZS/HDB3 encoder and decoder that can be either enabled or disabled • Generates pulses that comply with the ITU-T G.703 pulse template for E3 applications • On-chip clock synthesizer provides the appropriate rate clock from a single 12.288 MHz Clock • Generates pulses that comply with the DSX-3 pulse template, as specified in Bellcore GR-499-CORE and ANSI T1.102_1993 • Provides low jitter output clock TRANSMITTER • Generates pulses that comply with the STSX-1 Relayless pulse template, as specified in Bellcore GR-253CORE • R3 Technology Redundancy) (Reconfigurable, • Transmitter can be turned off in order to support redundancy designs RECEIVE INTERFACE CHARACTERISTICS • Compliant with Bellcore GR-499, GR-253 and ANSI T1.102 Specification for transmit pulse • Tri-state Transmit output capability for redundancy applications • Integrated Adaptive Receive Equalization (optional) for optimal Clock and Data Recovery • Each Transmitter can be turned on or off • Transmitters provide Current Output Drive CONTROL AND DIAGNOSTICS • Declares and Clears the LOS defect per ITU-T G.775 requirements for E3 and DS3 applications • Meets Jitter Tolerance Requirements, as specified in ITU-T G.823_1993 for E3 Applications • Parallel Microprocessor Interface for control and configuration • Meets Jitter Tolerance Requirements, as specified in Bellcore GR-499-CORE for DS3 Applications • Supports monitoring optional internal Transmit driver • Each channel supports Analog, Remote and Digital Loop-backs • Declares Loss of Lock (LOL) Alarm • Built-in B3ZS/HDB3 Decoder (which can be disabled) • Single 3.3 V ± 5% power supply • 5 V Tolerant digital inputs • Available in 420 pin TBGA Thermally enhanced Package • Recovered Data can be muted while the LOS Condition is declared • Outputs either Single-Rail or Dual-Rail data to the Terminal Equipment 2 XRT73R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT PRELIMINARY TABLE OF CONTENTS REV. P1.0.3 GENERAL DESCRIPTION.............................................................................................................. 1 APPLICATIONS ............................................................


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