CB664

www.DataSheet4U.com CB664 I2C Clock Distribution Buffer for Three Banks of Mobile SDRAM Approved Product Product Features 7 output buffer for high clock fanout applications. 2 Output may be individually disabled with I C VDD = 3.3 volts Output frequency range 10 MHz to 100 MHz <250ps skew between output clocks. 16-pin SSOP and TSSOP package. Product Description The device is a high fanout system clock buffer. Its primary application is to distribute clocks needed to support a wide range of applications such as SDRAM clocks. This device provides low skew distribution clock heavily loaded. One important application of this component is where long traces are used to transport clocks from their generating devices to their loads. The creation of EMI and the degradation of waveform rise and fall times is greatly reduces by running a single reference clock trace to this device and then using it to these devices EMI is therefore minimized and board real estate is saved. Block Diagram Pin Configuration VDD I2C Control 2 SDATA SCLK SDR(0:1) VDD SDR0 SDR1 VSS CLKIN SDR2 VDD SDATA 1 SDR2 SDR(3:4) SDR(5:6) REFIN 2 2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 SDR6 SDR5 VSS VDD SDR4 SDR3 VSS SCLK Cypress Semiconductor Corporation 525 Los Coches St. Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571 http://www.cypress.com Document#: 38-07024 Rev. ** 5/6/99 Page 1 of 8 www.DataSheet4U.com CB664 I2C Clock Distribution Buffer for Three Banks of Mobile SDRAM Ap...