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XRT5894 Dataheets PDF



Part Number XRT5894
Manufacturers Exar Corporation
Logo Exar Corporation
Description Four-Channel E1 Line Interface
Datasheet XRT5894 DatasheetXRT5894 Datasheet (PDF)

www.DataSheet4U.com Four-Channel E1 Line Interface (3.3V or 5.0V) March 2000-3 XRT5894 FEATURES D Compliant with ITU G.703 Pulse Mask Template for 2.048Mbps (E1) Rates D Four Independent CEPT Transceivers D Supports Differential Transformer Coupled Receivers and Transmitters D On Chip Pulse Shaping for Both 75W and 120W Line Drivers D Compliant with ITU G.775 LOS Declaration/Clearing Recommendation D Optional User Selectable LOS Declaration/Clearing Delay D Logical Inputs Accept either 3.3V o.

  XRT5894   XRT5894


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www.DataSheet4U.com Four-Channel E1 Line Interface (3.3V or 5.0V) March 2000-3 XRT5894 FEATURES D Compliant with ITU G.703 Pulse Mask Template for 2.048Mbps (E1) Rates D Four Independent CEPT Transceivers D Supports Differential Transformer Coupled Receivers and Transmitters D On Chip Pulse Shaping for Both 75W and 120W Line Drivers D Compliant with ITU G.775 LOS Declaration/Clearing Recommendation D Optional User Selectable LOS Declaration/Clearing Delay D Logical Inputs Accept either 3.3V or 5.0V Levels D Ultra-Low Power Dissipation D +3.3V or 5.0V Supply Operations D Individual Transmit Channel Over Temperature Protection APPLICATIONS D SDH Multiplexer D Digital Cross Connects GENERAL DESCRIPTION The XRT5894 is an optimized four channel 3.3V line interface unit fabricated using low power CMOS technology. The device contains four independent E1 channels. Each channel performs the driver and receiver functions necessary to convert bipolar signals to logical levels and vice versa. The device requires transformers on both receiver and transmitter sides, and supports both balanced and unbalanced interfaces. The device offers two distinct modes of LOS detection. The first method, which does not require an external clock, provides an LOS output indication signal with thresholds and delay that comply with the ITU G.775 requirements. In the second mode, the user provides an external clock that increases the delay for LOS declaration and clearing. This feature provides the user with the flexibility to implement LOS specifications that require a delay greater than the G.775 requirements. ORDERING INFORMATION Operating Temperature Range -40°C to +85°C Part No. XRT5894IV Package 64 Lead TQFP (10 x 10 x 1.4mm) Rev. 1.10 E2000 EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7017 XRT5894 BLOCK DIAGRAM Transceiver 1 Transceiver 2 Transceiver 3 Tranceiver 4 RXPOS4 (47) Signal Peak Detector RRING4 (42) VCC LOS Detect Loss Delay Counter 1 Mux O LOS4 (48) Receive Comparators RXNEG4 (46) RTIP4 (43) TIP 1:2 R1 R2 RX Input RING LOSCNT (45) LOSSEL (25) Transmit Line Drivers TIP TX OUTPUT RING 2:1 R3 9.1 R4 9.1 TRING4 (55) TTIP4 (53) Pulse Shaping Duty Cycle Adjust 0 0 Mux 1 1 NRZ To RZ TXCLK4 (51) TXPOS4 (49) TXNEG4 (50) Figure 1. XRT5894 Block Diagram Receiver Notes D The same type 1:2CT ratio transformer may be used at the receiver input and transmitter output. D R1 and R2 are both 150W for 75W operation, or 240W for 120W operation. D Return loss exceeds ITU G.703 specification with these resistors and a 1:2CT ratio input transformer. LOS (Loss of Signal) Notes D LOSSEL (pin 25) is connected to logic “1” for ITU G.775 compliant LOS delay, or to logic 0 for user programmable additional delay. D LOSCNT (pin 45) is unconnected when LOSSEL is logic 1, or connected to an external clock when LOSSEL is logic 0. Transmitter Notes D Return loss exceeds ETSI 300 166 specification with a 1:2 ratio transformer. D R3 and R4 are always 9.1W for both 75W and 120W applications. Rev. 1.10 2 XRT5894 PIN CONFIGURATION LOS4 RXPOS4 RXNEG4 LOSCNT GND RTIP4 RRING4 GND VCC GND TRING3 VCC TTIP3 GND RTIP3 RRING3 48 TXPOS4 TXNEG4 TXCLK4 GND TTIP4 VCC TRING4 GND GND TRING1 VCC TTIP1 GND TXCLK1 TXNEG1 TXPOS1 49 33 32 TXCLK3 TXNEG3 TXPOS3 LOS3 RXPOS3 RXNEG3 GND LOSSEL NC VCC RXNEG2 RXPOS2 LOS2 TXPOS2 TXNEG2 TXCLK2 64 1 16 17 LOS1 RXPOS1 RXNEG1 VCC RTIP1 RRING1 VCC 64 LEAD THIN QUAD FLAT PACK (10 x 10 x 1.4 mm, TQFP) Rev. 1.10 3 TTIP2 GND RTIP2 RRING2 GND TRING2 VCC GND VCC XRT5894 PIN DESCRIPTION Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Symbol LOS1 RXPOS1 RXNEG1 VCC RTIP1 RRING1 VCC GND VCC GND TRING2 VCC TTIP2 GND RTIP2 RRING2 TXCLK2 TXNEG2 TXPOS2 LOS2 RXPOS2 RXNEG2 VCC NC LOSSEL GND RXNEG3 RXPOS3 LOS3 TXPOS3 TXNEG3 TXCLK3 RRING3 RTIP3 O O O I I I I I I I I I I I O O O O O I I Type O O O Description Receiver 1 Loss of Signal. Asserted during LOS condition. Receiver 1 Positive Data Out. Positive RZ data output for channel 1. Receiver 1 Negative Data Out. Negative RZ data output for channel 1. Positive Supply (+3.3V or +5.0V + 5%). Digital circuitry. Receiver 1 Positive Bipolar Input. Receiver 1 Negative Bipolar Input. Positive Supply (+3.3V or +5.0V + 5%). Analog circuitry. Analog Ground. Positive Supply. (+3.3V or +5.0V + 5%). Analog circuitry. Analog Ground. Transmitter 2 Negative Bipolar Output. Positive Supply (+3.3V or +5.0V + 5%). Transmitter channel 2. Transmitter 2 Positive Bipolar Output. Analog Ground. Transmitter channel 2. Receiver 2 Positive Bipolar Input. Receiver 2 Negative Bipolar Input. Transmitter 2 Clock Input. Use for clocked mode with NRZ data.1 Transmitter 2 Negative Data Input. Negative NRZ or RZ data input.1 Transmitter 2 Positive Data Input. Positive NRZ or RZ data input.1 Receiver 2 Loss of Signal. Asserted during LOS condition. Receiver 2 Positive Data Out. Positive RZ data output for channel 2. Receiver 2 Ne.


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