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Modulator Driver. MAX3942 Datasheet

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Modulator Driver. MAX3942 Datasheet







MAX3942 Driver. Datasheet pdf. Equivalent




MAX3942 Driver. Datasheet pdf. Equivalent





Part

MAX3942

Description

10Gbps Modulator Driver

Manufacture

Maxim Integrated Products

Datasheet
Download MAX3942 Datasheet


Maxim Integrated Products MAX3942

MAX3942; www.DataSheet4U.com 19-2934; Rev 1; 6/07 10Gbps Modulator Driver General Descr iption The MAX3942 is designed to drive high-speed optical modulators at data rates up to 10.7Gbps. It functions as a modulation circuit, with an integrated control op amp externally programmed b y a DC voltage. A high-bandwidth, fully differential signal path is internally implemented to mi.


Maxim Integrated Products MAX3942

nimize jitter accumulation. When a clock signal is available, the integrated da ta-retiming function can be selected to reject input-signal jitter. The MAX394 2 receives differential CML signals (gr oundreferenced) with on-chip line termi nations of 50Ω. Each of the differenti al outputs has an on-chip 50Ω resistor for back termination. The driver is ab le to deliver a modu.


Maxim Integrated Products MAX3942

lation current of 40mA P-P to 120mA P-P, with an edge speed of 23ps (typical 20 % to 80%). This modulation current refl ects a modulation voltage of 1.0VP-P to 3.0VPP single ended or 2.0VP-P to 6.0V P-P differential. The MAX3942 also incl udes an adjustable pulse-width control circuit to precompensate for asymmetric al modulator characteristics. It is ava ilable in a compac.



Part

MAX3942

Description

10Gbps Modulator Driver

Manufacture

Maxim Integrated Products

Datasheet
Download MAX3942 Datasheet




 MAX3942
www.DataSheet4U.com
19-2934; Rev 1; 6/07
10Gbps Modulator Driver
General Description
The MAX3942 is designed to drive high-speed optical
modulators at data rates up to 10.7Gbps. It functions as
a modulation circuit, with an integrated control op amp
externally programmed by a DC voltage.
A high-bandwidth, fully differential signal path is inter-
nally implemented to minimize jitter accumulation. When
a clock signal is available, the integrated data-retiming
function can be selected to reject input-signal jitter.
The MAX3942 receives differential CML signals (ground-
referenced) with on-chip line terminations of 50Ω. Each
of the differential outputs has an on-chip 50Ω resistor for
back termination. The driver is able to deliver a modula-
tion current of 40mAP-P to 120mAP-P, with an edge
speed of 23ps (typical 20% to 80%). This modulation
current reflects a modulation voltage of 1.0VP-P to 3.0VP-
P single ended or 2.0VP-P to 6.0VP-P differential.
The MAX3942 also includes an adjustable pulse-width
control circuit to precompensate for asymmetrical mod-
ulator characteristics. It is available in a compact 4mm
4mm, 24-pin thin QFN package and operates over
the -40°C to +85°C temperature range.
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
MAX3942ETG -40°C to +85°C 24 Thin QFN (4mm  4mm)
MAX3942ETG+ -40°C to +85°C 24 Thin QFN (4mm  4mm)
+Denotes a lead-free package.
Features
23ps Edge Speed
Single-Ended Modulation Voltage Up to 3VP-P
Differential Modulation Voltage Up to 6VP-P
Selectable Data-Retiming Latch
Up to 10.7Gbps Operation
50Ω On-Chip Input and Output Terminations
Pulse-Width Adjustment
Enable and Polarity Controls
ESD Protection
Applications
Mach Zehnder Modulators
Packaged Direct-Modulated Lasers
SONET OC-192 and SDH STM-64 Transmission
Systems
DWDM Systems
Long/Short-Reach Optical Transmitters
10Gbps Ethernet
Pin Configuration appears at end of data sheet.
Typical Application Circuit
-5.2V
50Ω
DATA+
MAX3952 DATA-
10Gbps
SERIALIZER
CLK+
CLK-
0.01μF
0.01μF
0.01μF
0.01μF
PLRT MODEN RTEN
GND
50Ω DATA+
OUT-
50Ω DATA-
50Ω CLK+
MAX3942
50Ω CLK-
PWC+ PWC-
2kΩ
-5.2V
MODSET
+
VMODSET
-
OUT+
VEE
-5.2V
L2
0.01μF
50Ω
50Ω
MACH ZEHNDER
MODULATOR
L1
0.01μF
50Ω
1000pF
0.1μF
-5.2V
L1 AND L2 ARE HIGH-FREQUENCY FERRITE BEADS
REPRESENTS A CONTROLLED-IMPEDANCE TRANSMISSION LINE.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.





 MAX3942
10Gbps Modulator Driver
ABSOLUTE MAXIMUM RATINGS
Supply Voltage VEE ..............................................-6.0V to +0.5V
Voltage at MODEN,
RTEN, PLRT, MODSET............................(VEE - 0.5V) to +0.5V
Voltage at DATA+, DATA-, CLK+, and CLK-……-1.65V to +0.5V
Voltage at OUT+, OUT- ................................……….-4V to +0.5V
Voltage at PWC+, PWC- ...................(VEE - 0.5V) to (VEE + 1.7V)
Continuous Power Dissipation (TA = +85°C)
24-Pin Thin QFN (derate 20.8mW/° above +85°C) ....1354mW
Current into or out of OUT+, OUT-.................……………...80mA
Storage Temperature Range .....................……-55°C to +150°C
Operating Temperature Range ....................……-40°C to +85°C
Lead Temperature (soldering, 10s)............………………+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VEE = -5.5V to -4.9V, TA = -40°C to +85°C. Typical values are at VEE = -5.2V, IMOD = 100mA, and TA = +25°C, unless otherwise noted.)
PARAMETER
Power-Supply Voltage
Supply Current
Power-Supply Noise Rejection
SIGNAL INPUT (Note 3)
Input Data Rates
Single-Ended Input Resistance
Single-Ended Input Voltage
Differential Input Voltage
Differential Input Return Loss
MODULATION (Note 5)
Maximum Modulation Current
Minimum Modulation Current
MODSET Voltage Range
Equivalent Modulation
Modulation Set Bandwidth
MODSET Input Resistance
SYMBOL
VEE
IEE
PSNR
CONDITIONS
Excluding IMOD
(Note 1)
Retime disabled
Retime enabled
f  2MHz (Note 2); see Figure 3
RIN
VIS
VID
RLIN
NRZ
Input to GND
DC-coupled, Figure 1a
AC-coupled, Figure 1b
DC-coupled (Note 4)
AC-coupled (Note 4)
 15GHz
VMODSET
RMODEQV
VMODSET = VEE
(Note 7)
Modulation depth 10%, 50 driver load
MIN TYP MAX UNITS
-5.5 -4.9 V
125 175
140 200
mA
15 dB
42.5
-1
-0.4
0.2
0.2
10.7
50
15
58.5
0
+0.4
2.0
1.6
Gbps

V
VP-P
dB
112 120
mAP-P
37 41 mAP-P
VEE
VEE +
V
11.1 
5 MHz
20 k
Modulation-Current
Temperature Stability
(Note 6)
-980
0 ppm/°C
Modulation-Current-Setting Error
Output Resistance
ROUT
50 driver load, TA = +25°C
OUT+ and OUT- to GND
-10 +10
42.5 50 58.5
%

2 _______________________________________________________________________________________





 MAX3942
10Gbps Modulator Driver
ELECTRICAL CHARACTERISTICS (continued)
(VEE = -5.5V to -4.9V, TA = -40°C to +85°C. Typical values are at VEE = -5.2V, IMOD = 100mA, and TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Off Current
MODEN = VEE, MODSET = VEE, DATA+ =
high, DATA- = low
1.6 mA
Differential Output Return Loss
Output Edge Speed
Setup/Hold Time
Pulse-Width Adjustment Range
RLOUT
tSU, tHD
IMOD = 50mA
10GHz
20% to 80% (Notes 6, 8)
Figure 2 (Note 6)
(Notes 6, 8)
10
23
25
±30 ±50
32
dB
ps
ps
ps
Pulse-Width Control Input
Range (Single Ended)
For PWC+ and PWC-
VEE +
0.5
VEE +
1.5
V
Pulse-Width Control Input
Range (Differential)
(PWC+) - (PWC-)
-0.5
+0.5
V
Output Overshoot
Driver Random Jitter
Driver Deterministic Jitter
CONTROL INPUTS

RJDR
DJDR
(Notes 6, 8)
(Note 6)
PWC- = GND (Notes 6, 9)
5%
0.3 0.8 psRMS
8 13 psP-P
Input High Voltage
VIH (Note 10)
VEE +
2.0
V
Input Low Voltage
VIL (Note 10)
VEE +
0.8
V
Input Current
(Note 10)
-80
+200
μA
Note 1: Supply current remains elevated once the retiming function has been enabled. Power must be cycled to reduce supply
current after the retiming function has been disabled.
Note 2: Power-supply noise rejection is specified as PSNR = 20Log(Vnoise (on Vcc) / ΔVOUT). VOUT is the voltage across a 50Ω load.
Vnoise (on Vcc) = 100mVP-P.
Note 3: For DATA+, DATA-, CLK+, and CLK-.
Note 4: CLK input characterized at 10.7Gbps.
Note 5: Minimum voltage on OUT+ and OUT- is VEE + 1.9V.
Note 6: Guaranteed by design and characterization using the circuit shown in Figure 3.
Note 7: RMODEQV = (VMODSET - VEE) / (IMOD - 37mA).
Note 8: 50Ω load, characterized at 10.7Gbps with a 1111 1111 0000 0000 pattern.
Note 9: Deterministic jitter is defined as the arithmetic sum of PWD (pulse-width distortion) and PDJ (pattern-dependent jitter).
Measured with a 10.7Gbps 27 - 1 PRBS pattern with 80 zeros and 80 ones inserted in the data pattern.
Note 10: For MODEN and PLRT.
_______________________________________________________________________________________ 3



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