GSC24BC02 EEPROMS Datasheet
(GSC24BC01 - GSC24BC16) 2-WIRE SERIAL EEPROMS
|Total Page||9 Pages|
ISSUED DATE :2006/06/14
REVISED DATE :
2-wire Serial EEPROMs 1K/2K/4K/8K/16K
The GSC24BC family provides 1K, 2K, 4K, 8K and 16K of serial electrically erasable and programmable
read-only memory (EEPROM). The wide Vdd range allows for low-voltage operation down to 1.8V. The device,
fabricated using traditional CMOS EEPROM technology, is optimized for many industrial and commercial
applications where low-voltage and low-power operation is essential. The device is accessed via a 2-wire serial
Internally organized as 128x8 (1K), 256x8 (2K)
512x8 (4K), 1024x8 (8K), 2048x8 (16K),
Low-voltage and standard-voltage operation:
-wire serial interface bus
Date retention: 100years
High endurance: 1,000,000 Write Cycles
100KHz (1.8V) & 400KHz (5V) compatibility
Bi-directional data transfer protocol
Self-timed write cycle (5ms max)
Write protect pin for hardware data protection
8-byte page (1K, 2K) and 16-byte page (4K,8K,16K)
Allows for partial page write
Figure 1. Pin Configurations
A0 – A2
Serial Clock Input
Absolute Maximum Ratings
Voltage on Any Pin with Respect to Ground
-0.8 to Vcc +1.5
Maximum Operating Voltage
DC Output Current
Operating Temperature Range
-55 ~ +125
Storage Temperature Range
-65 ~ +150
Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of
these specifications are not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Figure 2. Block Diagram
ISSUED DATE :2006/06/14
REVISED DATE :
Serial Data (SDA): The SDA pin used for sending and receiving data bits in serial mode. Since the SDA pin is
defined as an open-drain connection, a pull-up resistor is needed.
Serial Clock (SCL): The SCL input is used to synchronize data input and output with the clocked out on the
falling edge of SCL.
Device/Page Addresses (A2, A1, A0): The A2, A1, and A0 pins are used to address multiple devices on a
single bus system and should be hard-wired.
The GSC24BC01 and GSC24BC02 use the A2, A1 and A0 pins to provide the capability for addressing up
to eight 1K/2K devices on a single bus system (please see the Device Addressing section for further
The GSC24BC04 uses the A2 and A1 inputs and a total of for 4K device may be addressed on a single
bus system. The A0 pin in not used, but should be grounded if possible.
The GSC24BC08 only uses the A2 input hardwire addressing. On a single bus system, a total of two 8K
devices may be addressed. The A0 and A1 pins are not used, but should be grounded if possible.
The GSC24BC16 does not uses the device address pins, so only one device can be connected to a
single bus system. Therefore, the A0, A1 and A2 pins are not used, but should be grounded if possible.
Write Protect (WP): The GSC24BC01/02/04/08/16 has a Write Protect pin that provides hardware data
protection. When connected to ground, the Write Protect pin allows for normal read/write operations. If the WP
pin is connected to VCC, no data can be overwritten.
|Features||www.DataSheet4U.com ISSUED DATE :2006/06 /14 REVISED DATE : GSC24BC01/02/04/08/ 16 2-wire Serial EEPROMs 1K/2K/4K/8K/16 K The GSC24BC family provides 1K, 2K, 4 K, 8K and 16K of serial electrically er asable and programmable read-only memor y (EEPROM). The wide Vdd range allows f or low-voltage operation down to 1.8V. The device, fabricated using traditiona l CMOS EEPROM technology, is optimized for many industrial and commercial appl ications where low-voltage and low-powe r operation is essential. The device is accessed via a 2-wire serial interface . Description Features Internally or ganized as 128x8 (1K), 256x8 (2K) 512x8 (4K), 1024x8 (8K), 2048x8 (16K), Low-v oltage and standard-voltage operation: 1.8V~5.5V -wire serial interface bus Da te retention: 100years High endurance: 1,000,000 Write Cycles 100KHz (1.8V) & 400KHz (5V) compatibility Bi-direction al data transfer protocol Self-timed wr ite cycle (5ms max) Write protect pin f or hardware data protection 8-byte page (1K, 2K) and 16-byte pa.|
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