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AT25F512AN. 25F512AN Datasheet

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AT25F512AN. 25F512AN Datasheet






25F512AN AT25F512AN. Datasheet pdf. Equivalent




25F512AN AT25F512AN. Datasheet pdf. Equivalent





Part

25F512AN

Description

AT25F512AN



Feature


www.DataSheet4U.com Features • Serial Peripheral Interface (SPI) Compatible • Supports SPI Modes 0 (0,0) and 3 (1 ,1) – Datasheet Describes 0 Operation • 33 MHz Clock Rate • Byte Mode a nd 128-byte Page Mode for Program Opera tions • Sector Architecture: • • • • • • • • • – Two Sec tors with 32K Bytes Each – 256 Pages per Sector Product Identification Mode Low-voltage O.
Manufacture

ATMEL Corporation

Datasheet
Download 25F512AN Datasheet


ATMEL Corporation 25F512AN

25F512AN; peration – 2.7 (VCC = 2.7 to 3.6V) Sec tor Write Protection Write Protect (WP) Pin and Write Disable Instructions for both Hardware and Software Data Protec tion Self-timed Program Cycle (75 µs/b yte typical) Self-timed Sector Erase Cy cle (1 second/sector typical) Single Cy cle Reprogramming (Erase and Program) f or Status Register High Reliability – Endurance: 10,000 Writ.


ATMEL Corporation 25F512AN

e Cycles Typical – Data Retention: 20 Years 8-lead JEDEC SOIC and 8-lead SAP Packages 512Kbit High Speed SPI Serial Flash Memory 512K (65,536 x 8) Descri ption The AT25F512A provides 524,288 bi ts of serial reprogrammable Flash memor y organized as 65,536 words of 8 bits e ach. The device is optimized for use in many industrial and commercial applica tions where low-powe.


ATMEL Corporation 25F512AN

r and low-voltage operation are essentia l. The AT25F512A is available in a spac e-saving 8-lead JEDEC SOIC and 8-lead S AP packages. The AT25F512A is enabled t hrough the Chip Select pin (CS) and acc essed via a three-wire interface consis ting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK ). All write cycles are completely self -timed. Block writ.

Part

25F512AN

Description

AT25F512AN



Feature


www.DataSheet4U.com Features • Serial Peripheral Interface (SPI) Compatible • Supports SPI Modes 0 (0,0) and 3 (1 ,1) – Datasheet Describes 0 Operation • 33 MHz Clock Rate • Byte Mode a nd 128-byte Page Mode for Program Opera tions • Sector Architecture: • • • • • • • • • – Two Sec tors with 32K Bytes Each – 256 Pages per Sector Product Identification Mode Low-voltage O.
Manufacture

ATMEL Corporation

Datasheet
Download 25F512AN Datasheet




 25F512AN
www.DataSheet4U.com
Features
Serial Peripheral Interface (SPI) Compatible
Supports SPI Modes 0 (0,0) and 3 (1,1)
– Datasheet Describes 0 Operation
33 MHz Clock Rate
Byte Mode and 128-byte Page Mode for Program Operations
Sector Architecture:
– Two Sectors with 32K Bytes Each
– 256 Pages per Sector
Product Identification Mode
Low-voltage Operation
– 2.7 (VCC = 2.7 to 3.6V)
Sector Write Protection
Write Protect (WP) Pin and Write Disable Instructions for both Hardware and Software
Data Protection
Self-timed Program Cycle (75 µs/byte typical)
Self-timed Sector Erase Cycle (1 second/sector typical)
Single Cycle Reprogramming (Erase and Program) for Status Register
High Reliability
– Endurance: 10,000 Write Cycles Typical
– Data Retention: 20 Years
8-lead JEDEC SOIC and 8-lead SAP Packages
Description
The AT25F512A provides 524,288 bits of serial reprogrammable Flash memory orga-
nized as 65,536 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation
are essential. The AT25F512A is available in a space-saving 8-lead JEDEC SOIC and
8-lead SAP packages.
The AT25F512A is enabled through the Chip Select pin (CS) and accessed via a
three-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and
Serial Clock (SCK). All write cycles are completely self-timed.
Block write protection for the entire memory array is enabled by programming the sta-
tus register. Separate write enable and write disable instructions are provided for
additional data protection. Hardware data protection is provided via the Write Protect
(WP) pin to protect against inadvertent write attempts to the status register. The HOLD
pin may be used to suspend any serial communication without resetting the serial
sequence.
Table 1. Pin Configuration
Pin Name Function
CS Chip Select
SCK
Serial Data Clock
SI Serial Data Input
SO Serial Data Output
GND
Ground
VCC
Power Supply
WP Write Protect
HOLD
Suspends Serial Input
8-lead SOIC
CS
SO
WP
GND
1
2
3
4
8 VCC
7 HOLD
6 SCK
5 SI
8-lead SAP
VCC 8
HOLD 7
SCK 6
SI 5
1 CS
2 SO
3 WP
4 GND
Bottom View
512Kbit High
Speed SPI
Serial Flash
Memory
512K (65,536 x 8)
AT25F512A
Rev. 3345F–FLASH–11/06
1




 25F512AN
www.DataSheet4U.com
Absolute Maximum Ratings*
Operating Temperature........................................−40°C to +85°C
Storage Temperature .........................................−65°C to +150°C
Voltage on Any Pin
with Respect to Ground ........................................ −1.0V to +5.0V
Maximum Operating Voltage ............................................ 4.2V
DC Output Current........................................................ 5.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
Figure 1. Block Diagram
65,536 x 8
2 AT25F512A
3345F–FLASH–11/06




 25F512AN
www.DataSheet4U.com
AT25F512A
Table 2. Pin Capacitance(1)
Applicable over recommended operating range from TA = 25°C, f = 20 MHz, VCC = +3.6V (unless otherwise noted)
Symbol Test Conditions
Max
Units
Conditions
COUT
CIN
Note:
Output Capacitance (SO)
Input Capacitance (CS, SCK, SI, WP, HOLD)
1. This parameter is characterized and is not 100% tested.
8 pF VOUT = 0V
6 pF VIN = 0V
Table 3. DC Characteristics(1)
Applicable over recommended operating range from: TAI = 40 to +85°C, VCC = +2.7 to +3.6V,
TAC = 0 to +70°C, VCC = +2.7 to +3.6V (unless otherwise noted)
Symbol Parameter
Test Condition
Min Typ
VCC
ICC1
ICC2
ISB
IIL
IOL
VIL(2)
VIH(2)
VOL
VOH
Notes:
Supply Voltage
Supply Current
Supply Current
Standby Current
Input Leakage
Output Leakage
Input Low Voltage
VCC = 3.6V at 33 MHz, SO = Open Read
VCC = 3.6V at 33 MHz, SO = Open Write
VCC = 2.7V, CS = VCC; SCK, SI, WP,
HOLD = 0V or VCC
VIN = 0V or VCC
VIN = 0V or VCC, TAI = 40°C to 85°C
Input High Voltage
Output Low Voltage
Output High Voltage
2.7V VCC 3.6V
IOL = 0.15 mA
IOH = 100 µA
1. Preliminary – subject to change
2. VIL and VIH max are reference only and are not tested.
2.7
3.0
3.0
0.6
VCC x 0.7
VCC 0.2
10.0
25.0
2.0
Max
3.6
15.0
35.0
10.0
3.0
3.0
VCC x 0.3
VCC + 0.5
0.2
Units
V
mA
mA
µA
µA
µA
V
V
V
V
3345F–FLASH–11/06
3



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