AZ100E116

www.DataSheet4U.com ARIZONA MICROTEK, INC. AZ10E116 AZ100E116 ECL/PECL Quint Differential Line Receiver FEATURES 500ps Maximum Propagation Delay Dedicated VCCO Pin for Each Receiver Operating Range of 4.2V to 5.46V 75kΩ Internal Input Pulldown Resistors Direct Replacement for ON Semiconductor MC10E116 & MC100E116 PACKAGE PLCC 28 PLCC 28 1 2 PACKAGE AVAILABILITY PART NUMBER AZ10E116FN AZ100E116FN MARKING AZM10E116 AZM100E116 NOTES 1,2 1,2 Add R2 at end of part number for 13 inch (2.5K parts) Tape & Reel. Date code format: “YY” for year followed by “WW” for week. DESCRIPTION The AZ10/100E116 is a quint differential line receiver with emitter-follower outputs. The E116 provides a VBB output for single-ended use or a DC bias reference for AC coupling to the device. For single-ended input applications, the VBB reference should be connected to one side of the Dn/D ¯ n differential input pair. The input signal is then fed to the other Dn/D ¯ n input. The VBB pin should be used only as a bias for the E116 as its sink/source capability is limited. When used, the VBB pin should be bypassed to ground via a 0.01μF capacitor. The receiver design features clamp circuitry to cause a defined state if both the inverting and non-inverting inputs are left open; in this case the Q output goes LOW, while the Q ¯ output goes HIGH. This feature makes the device ideal for twisted pair applications. If both inverting and non-inverting inputs are at an equal po...