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ARIZONA MICROTEK, INC.
AZ10E142 AZ100E142
ECL/PECL 9-bit Shift Register FEATURES
• • • • • • • 700 MHz Minimum Shift Frequency 9-Bit for Byte-Parity Application Asynchronous Master Reset Dual Clocks Operating Range of 4.2V to 5.46V 75kΩ Internal Input Pulldown Resistors Direct Replacement for ON Semi MC10E142 & MC100E142 PACKAGE
PLCC 28 PLCC 28
1 2
PACKAGE AVAILABILITY PART NUMBER
AZ10E142FN AZ100E142FN
MARKING
AZM10E142 AZM100E142
NOTES
1,2 1,2
Add R2 at end of part number for 13 inch (2.5K parts) Tape & Reel. Date code format: “YY” for year followed by “WW” for week.
DESCRIPTION
The AZ10/100E142 is a 9-bit shift register, designed with byte-parity applications in mind. The E142 performs serial/parallel in and serial/parallel out, shifting in one direction. The nine inputs D0-D8 accept parallel input data, while S-IN accepts serial input data. The Qn outputs do not need to be terminated for the shift operation to function. To minimize noise and power, any Q output not used should be left unterminated. The SEL (Select) input pin is used to switch between the two modes of operation – SHIFT and LOAD. The shift direction is from bit 0 to bit 8. Input data is accepted by the registers a set-up time before the positive going edge of CLK1 or CLK2; shifting is also accomplished on the positive clock edge. A HIGH on the Master Reset pin (MR) asynchronously resets all the registers to zero. NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.
SEL 25 26
D8 24
D7 23
D6 22
D5 21
VCCO
20
Q8 19 18 17
MR
Q7
CLK1
27
Q6
CLK2
28
16
VCC
Q5
VEE
S-IN
1
15
2
Pinout: 28-lead PLCC (top view)
14
VCCO
D0
3
13
Q4
D1
4
12
Q3
5
6
7
8
9
10
11
D2
D3
D4
VCCO
Q0
Q1
Q2
1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541 www.azmicrotek.com
AZ10E142 AZ100E142
LOGIC SYMBOL
S-IN 1 D Q Q0
FUNCTION TABLE SEL L H MODE Load Shift
D0
0 Q1
1 D D1 0
Q
1 D D2 0
Q
Q2
1 D D3 0
Q
Q3
PIN DESCRIPTION
D4
1 D 0
Q
Q4
PIN D0 – D8 S – IN SEL CLK1, CLK2 MR Q0 – Q8 VCC , VCCO VEE
FUNCTION Parallel Data Inputs Serial Data Input Mode Select Input Clock Inputs Master Reset Data Outputs Positive Supply Negative Supply
1 D D5 0
Q
Q5
1 D D6 0 1 D D7 0
Q
Q6
Q
Q7
1 D D8 0
Q
Q8
SEL
CLK1 CLK2 MR
Absolute Maximum Ratings are those values beyond which device life may be impaired.
Symbol VCC VI VEE VI IOUT TA TSTG Characteristic PECL Power Supply (VEE = 0V) PECL Input Voltage (VEE = 0V) ECL Power Supply (VCC = 0V) ECL Input Voltage (VCC = 0V) Output Current --- Continuous --- Surge Operating Temperature Range Storage Temperature Range Rating 0 to +8.0 0 to +6.0 -8.0 to 0 -6.0 to 0 50 100 -40 to +85 -65 to +150 Unit Vdc Vdc Vdc Vdc mA °C °C
10K ECL DC Characteristics (VEE = -4.94V to -5.46V, VCC = VCCO = GND)
Symbol Characteristic
1
VOH Output HIGH Voltage VOL Output LOW Voltage1 VIH Input HIGH Voltage VIL .