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GS74108ATP/J/X
SOJ, TSOP, FP-BGA Commercial Temp Industrial Temp Features
• Fast access time: 8, 10, 12 ns • CMOS low power operation: 120/95/85 mA at minimum cycle time • Single 3.3 V power supply • All inputs and outputs are TTL-compatible • Fully static operation • Industrial Temperature Option: –40° to 85°C • Package line up J: 400 mil, 36-pin SOJ package GJ: RoHS-compliant 400 mil, 36-pin SOJ package TP: 400 mil, 44-pin TSOP-II package GP: RoHS-compliant 400 mil, 44-pin TSOP-II package X: 6 mm x 10 mm FPBGA package GX: RoHS-compliant 6 mm x 10 mm FPBGA package • RoHS-compliant packages available
A4 A3 A2 A1 A0 CE DQ1 DQ2 VDD VSS DQ3 DQ4 WE A17 A16 A15 A14 A13
512K x 8 4Mb Asynchronous SRAM
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
8, 10, 12 ns 3.3 V VDD Center VDD and VSS
SOJ 512K x 8-Pin Configuration
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 NC A5 A6 A7 A8 OE DQ8 DQ7 VSS VDD DQ6 DQ5 A9 A10 A11 A12 A18 NC
36-pin 400 mil SOJ
Description
The GS74108A is a high speed CMOS Static RAM organized as 524,288 words by 8 bits. Static design eliminates the need for external clocks or timing strobes. The GS74108A operates on a single 3.3 V power supply and all inputs and outputs are TTL-compatible. The GS74108A is available in 400 mil SOJ, 400 mil TSOP-II, and 6 mm x 10 mm FPBGA packages.
FP-BGA 512K x 8 Bump Configuration (Package X)
1 2 3 4 5 6
Pin Descriptions Symbol
A0–A18 DQ1–DQ8 CE WE OE VDD VSS NC
Description
Address input Data input/output Chip enable input Write enable input Output enable input +3.3 V power supply Ground No connect
A B C D E F G H
NC DQ1 DQ2 VSS VDD DQ3 DQ4 NC
OE NC NC NC NC NC NC A16
A2 A1 A0 A18 A17 A13 A14 A15
A6 A5 A4 A3 A9 A10 A11 A12
A7 CE NC NC NC NC WE A8
NC DQ8 DQ7 VDD VSS DQ6 DQ5 NC
6 mm x 10 mm
*All GSI Technology packages are at least 5/6 RoHS compliant. Packages listed with the additional “G” designator are 6/6 RoHS compliant.
Rev: 1.07 1/2006
1/13
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108ATP/J/X
TSOP-II 512K x 8-Pin Configuration
NC NC A4 A3 A2 A1 A0 CE DQ1 DQ2 VDD VSS DQ3 DQ4 WE A17 A16 A15 A14 A13 NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC NC A5 A6 A7 A8 OE DQ8 DQ7 VSS VDD DQ6 DQ5 A9 A10 A11 A12 A18 NC NC NC
44-pin 400 mil TSOP II
Block Diagram
A0 Address Input Buffer
Row Decoder
Memory Array
A18 CE WE OE
Column Decoder
Control
I/O Buffer
DQ1
DQ8
Rev: 1.07 1/2006
2/13
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108ATP/J/X
Truth Table CE
H L L L Note: X: “H” or “L”
OE
X L X H
WE
X H L H
DQ1 to DQ8
Not Selected Read Write High Z
VDD Current
ISB1, ISB2
IDD
Absolute Maximum Ratings Parameter
Supply Voltage Input Voltage Output Voltage Allowable power dissipation Storage temperature
Symbol
VDD VIN VOUT PD TSTG
Rating
–0.5 to +4.6 –0.5 to VDD +0.5 (≤ 4.6 V max.) –0.5 to VDD +0.5 (≤ 4.6 V max.) 0.7 –55 to 150
Unit
V V V W
o
C
Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Recommended Operating Conditions Parameter
Supply Voltage for -8/-10/-12 Input High Voltage Input Low Voltage Ambient Temperature, Commercial Range Ambient Temperature, Industrial Range
Symbol
VDD VIH VIL TAc TAI
Min
3.0 2.0 –0.3 0 –40
Typ
3.3 — — — —
Max
3.6 VDD +0.3 0.8 70 85
Unit
V V V
o
C C
o
Notes: 1. Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns. 2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns. Rev: 1.07 1/2006 3/13 © 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74108ATP/J/X
Capacitance Parameter
Input Capacitance Output Capacitance
Symbol
CIN COUT
Test Condition
VIN = 0 V VOUT = 0 V
Max
5 7
Unit
pF pF
Notes: 1. Tested at TA = 25°C, f = 1 MHz 2. These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics Parameter
Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage
Symbol
IIL ILO VOH VOL
Test Conditions
VIN = 0 to VDD Output High Z VOUT = 0 to VDD IOH = –4 mA ILO = +4 mA
Min
– 1 uA –1 uA 2.4 —
Max
1 uA 1 uA — 0.4 V
Power Supply Currents
Parameter Symbol Test Conditions CE ≤ VIL All other inputs ≥ VIH or ≤ VIL Min. cycle time IOUT = 0 mA CE ≥ VIH All other inputs ≥ VIH or ≤VIL Min. cycle time CE ≥ VDD - 0.2V All other inputs ≥ VDD - 0.2V or ≤ 0.2V 0 to 70°C 8 ns 10 ns 12 ns 8 ns –40 to 85°C 10 ns 12 ns
Operating Supply Current
IDD
120 mA
95 mA
85 mA
130 m.