RD151TS501US

www.DataSheet4U.com RD151TS501US PLL clock generator series REJ03D0897-0102 Rev.1.02 Apr 25, 2007 Description RD151TS501US is phase-locked loop clock generator with high-performance. And RD151TS501US is low-jitters and will enable high density mounting by shrink small-size package (SSOP-8). Features Input frequency: Output frequency: 27.0 to 36.0 MHz 54.0 to 72.0 MHz (1 : 2), 67.5 to 72.0 MHz (1 : 2.5) 27.0 to 36.0 MHz (1 : 1), 33.75 to 36.0 MHz (1 : 1.25) (Selectable) Key Specifications Supply voltages: VDD = 2.7 to 3.6 V Operating temperature = -10 to 75 °C Cycle to cycle jitter = ±75 ps typ. Clock output duty cycle = 50±5% Stabilization time: 2ms max Power-down mode is supported Ordering Information Part Name RD151TS501USE Package Type SSOP-8 pin Package Code (Previous Package Code) PVSP0008KA–A (TTP-8DBV) Package Abbreviation US Taping Abbreviation (Quantity) E (3,000 pcs / Reel) Pin Arrangement VDD 1 8 DIV2 VDD 2 7 IN VSS 3 6 SEL OUT 4 5 PDWN (Top view) REJ03D0897-0102 Rev.1.02 Apr 25, 2007 Page 1 of 6 RD151TS501US Block Diagram VDD VSS IN 1/M Synthesizer Rpd = 100 kΩ DIV OUT 1/N PDWN SEL Rpd = 100 kΩ Rpd = 100 kΩ DIV2 Rpd = 100 kΩ Pin Descriptions Pin name VDD VSS OUT PDWN SEL IN DIV2 Note: No. 1,2 3 4 5 6 7 8 Type Power Ground Output Input Input Input Input Description Power supply GND Clock signal output Power-down control *1 Frequency select *1 Clock signal input *1 Frequency select *1 1. LVCMOS level input. Pull-dow...