DatasheetsPDF.com

89HPES16T7 Dataheets PDF



Part Number 89HPES16T7
Manufacturers IDT
Logo IDT
Description 16-Lane 7-Port PCI Express Switch
Datasheet 89HPES16T7 Datasheet89HPES16T7 Datasheet (PDF)

www.DataSheet4U.com 16-Lane 7-Port PCI Express® Switch 89HPES16T7 Product Brief Device Overview ◆ The 89HPES16T7 is a member of the IDT PRECISE™ family of PCI Express switching solutions. The PES16T7 is a 16-lane, 7-port peripheral chip that performs PCI Express Packet switching with a feature set optimized for high performance applications such as servers, storage and communications/networking. It provides connectivity and switching functions between a PCI Express upstream port and up to s.

  89HPES16T7   89HPES16T7


Document
www.DataSheet4U.com 16-Lane 7-Port PCI Express® Switch 89HPES16T7 Product Brief Device Overview ◆ The 89HPES16T7 is a member of the IDT PRECISE™ family of PCI Express switching solutions. The PES16T7 is a 16-lane, 7-port peripheral chip that performs PCI Express Packet switching with a feature set optimized for high performance applications such as servers, storage and communications/networking. It provides connectivity and switching functions between a PCI Express upstream port and up to seven downstream ports and supports switching between downstream ports. ◆ ◆ Features ◆ ◆ High Performance PCI Express Switch – Sixteen 2.5 Gbps PCI Express lanes – Seven switch ports – Upstream port configurable up to x8 – Two downstream ports configurable up to x4, four downstream ports are x1 – Low-latency cut-through switch architecture – Support for Max Payload Sizes up to 2048 bytes – One virtual channel – Eight traffic classes – PCI Express Base Specification Revision 1.1 compliant Flexible Architecture with Numerous Configuration Options – Automatic per port link width negotiation to x8, x4, x2 or x1 – Automatic lane reversal on all ports – Automatic polarity inversion on all lanes – Ability to load device configuration from serial EEPROM ◆ Legacy Support – PCI compatible INTx emulation – Bus locking Highly Integrated Solution – Requires no external components – Incorporates on-chip internal memory for packet buffering and queueing – Integrates sixteen 2.5 Gbps embedded SerDes with 8B/10B encoder/decoder (no separate transceivers needed) Reliability, Availability, and Serviceability (RAS) Features – Supports ECRC and Advanced Error Reporting – Internal end-to-end parity protection on all TLPs ensures data integrity even in systems that do not implement end-to-end CRC (ECRC) – Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O – Compatible with Hot-Plug I/O expanders used on PC and server motherboards Power Management – Utilizes advanced low-power design techniques to achieve low typical power consumption – Supports PCI Power Management Interface specification (PCIPM 1.1) • Supports device power management states: D0, D3hot and D3cold – Unused SerDes are disabled Block Diagram 7-Port Switch Core / 16 PCI Express Lanes Frame Buffer Route Table Port Arbitration Scheduler Transaction Layer Data Link Layer Transaction Layer Data Link Layer Transaction Layer Data Link Layer TL DLL Mux/Demux Phy Logical Layer TL DLL Mux/Demux Phy Logical Layer Multiplexer / Demultiplexer Phy Logical Layer Phy Logical Layer Phy Logical Layer Phy Logical Layer Multiplexer / Demultiplexer Phy Logical Layer Phy Logical Layer Phy Logical Layer Phy Logical Layer Multiplexer / Demultiplexer Phy Logical Layer Phy Logical Layer Phy Logical Layer Phy Logical Layer SerDes SerDes SerDes SerDes SerDes SerDes SerDes SerDes SerDes SerDes SerDes SerDes SerDes SerDes (Port 0) (Port 1) (Port 2) (Port 3) (Port 6) Figure 1 Internal Block Diagram IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. 1 of 2 © 2007 Integrated Device Technology, Inc. February 8, 2007 IDT ◆ 89HPES16T7 Product Brief ◆ ◆ Testability and Debug Features – Ability to read and write any internal register via the SMBus Twelve General Purpose Input/Output pins – Each pin may be individually configured as an input or output – Each pin may be individually configured as an interrupt input – Some pins have selectable alternate functions Packaged in a 25mm x 25mm 320-ball BGA with 1 mm ball spacing Processor Processor North Bridge Memory Memory Memory Memory South Bridge Product Description Utilizing standard PCI Express interconnect, the PES16T7 provides the most efficient fan-out solution for applications requiring high throughput, low latency, and simple board layout with a minimum number of board layers. It provides 8 GBps (64 Gbps) of aggregated, full-duplex switching capacity through 16 integrated serial lanes, using proven and robust IDT technology. Each lane provides 2.5 Gbps of bandwidth in both directions and is fully compliant with PCI Express Base specification 1.1. The PES16T7 is based on a flexible and efficient layered architecture. The PCI Express layers consist of SerDes, Physical, Data Link, and Transaction layers. The PES16T7 can operate either as a store and forward switch or a cut-through switch and is designed to switch memory and I/O transactions. It supports eight Traffic Classes (TCs) and one Virtual Channel (VC) with sophisticated resource management to allow efficient switching for applications requiring additional narrow port connectivity and also some high-end connectivity. x4 PES16T7 x4 x4 x1 I/O x1 I/O x1 I/O SATA x1 I/O SATA PCI Express Slots Figure 2 I/O Expansion Application x8 Upstream x8 x4 Upstream x4 PES16T7 PES16T7 x4 x1 x1 x1 x1 x4 x4 x1 x1 x1 x1 Figure 3 Configuration Options CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA.


89HPES16T4G2 89HPES16T7 89HPES24N3A


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)