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IS62LV12816LL

Integrated Circuit Solution

ULTRA LOW POWER CMOS STATIC RAM

www.DataSheet4U.com IS62LV12816L IS62LV12816L IS62LV12816LL IS62LV12816LL 128K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS ...


Integrated Circuit Solution

IS62LV12816LL

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Description
www.DataSheet4U.com IS62LV12816L IS62LV12816L IS62LV12816LL IS62LV12816LL 128K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FEATURES • High-speed access times: 55, 70, 100 ns • CMOS low power operation -- 120 mW (typical) operating -- 6 µW (typical) CMOS standby • TTL compatible interface levels • Single 2.7V-3.6V Vcc power supply • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Industrial temperature available • Available in the 44-pin TSOP-2 and 48-pin 6*8mm TF-BGA DESCRIPTION The 1+51 IS62LV12816L and IS62LV12816LL are high-speed, 2.097,152-bit static RAMs organized as 131,072 words by 16 bits. They are fabricated using 1+51's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CE is HIGH (deselected) or when CE is low and both LB and UB are HIGH, the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels. Easy memory expansion is provided by using Chip Enable Output and Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IS62LV12816L and IS62LV12816LL are packaged in the JEDEC standare 44-pin 400mil TSOP-2 and 48-pin 6*8mm TF-BGA. FUNCTIONAL BLOCK DIAGRAM A0-A16 DECODER 128K x 16 MEMORY ARRAY VCC ...




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